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LTC1064CSW#PBF PDF预览

LTC1064CSW#PBF

更新时间: 2024-01-29 03:36:57
品牌 Logo 应用领域
凌特 - Linear LTE光电二极管有源滤波器
页数 文件大小 规格书
20页 253K
描述
LTC1064 - Low Noise, Fast, Quad Universal Filter Building Block; Package: SO; Pins: 24; Temperature Range: 0°C to 70°C

LTC1064CSW#PBF 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SOIC包装说明:SOP, SOP24,.4
针数:24Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:7.5有源滤波器类型:SWITCHED CAPACITOR FILTER
中心频率或截止频率最大范围:140 kHz中心频率或截止频率最小范围:0.0001 kHz
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:15.4 mm湿度敏感等级:1
负电源电压最大值(Vsup):-8 V负电源电压最小值(Vsup):-2.37 V
标称负供电电压 (Vsup):-5 V功能数量:4
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C阶次:2ND
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
极和零点:2 AND 0电源:+-2.375/+-8 V
认证状态:Not Qualified响应:UNIVERSAL
座面最大高度:2.65 mm子类别:Active Filters
最大供电电流 (Isup):26 mA最大供电电压 (Vsup):8 V
最小供电电压 (Vsup):2.37 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
传递特性:RESISTOR PROGRAMMABLE宽度:7.5 mm
Base Number Matches:1

LTC1064CSW#PBF 数据手册

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LTC1064  
U
U
U
PIN FUNCTIONS  
V+, V(Pins 7, 19): Power Supplies. They should be  
bypassed with a 0.1µF ceramic capacitor. Low noise,  
nonswitching power supplies are recommended. The de-  
vice operates with a single 5V supply and with dual  
supplies. The absolute maximum operating power supply  
voltage is ±8V.  
AGND (Pin 6): Analog Ground. When the LTC1064 oper-  
ates with dual supplies, Pin 6 should be tied to system  
ground.WhentheLTC1064operateswithasinglepositive  
supply, the analog ground pin should be tied to 1/2 supply  
and it should be bypassed with a 1µF solid tantalum in  
parallel with a 0.1µF ceramic capacitor, Figure 1. The  
positive input of all the internal op amps, as well as the  
common reference of all the internal switches, are inter-  
nally tied to the analog ground pin. Because of this, a very  
“clean” ground is recommended.  
50/100 (Pin 17): By tying Pin 17 to V+, all filter sections  
operate with a clock-to-center frequency ratio internally  
setat50:1. WhenPin17isatmid-supplies, sectionsBand  
C operate with (fCLK/fO) = 50:1 and sections A and D  
operate at 100:1. When Pin 17 is shorted to the negative  
supply pin, all filter sections operate with (fCLK/fO) =  
100:1.  
CLK (Pin 18): Clock. For ±5V supplies the logic threshold  
level is 1.4V. For ±8V and 0V to 5V supplies the logic  
threshold levels are 2.2V and 3V respectively. The logic  
threshold levels vary ±100mV over the full military tem-  
perature range. The recommended duty cycle of the input  
clockis50%,althoughforclockfrequenciesbelow500kHz,  
the clock “on” time can be as low as 200ns. The maximum  
clock frequency for ±5V supplies is 4MHz. For ±7V  
supplies and above, the maximum clock frequency is  
7MHz.  
1
24  
23  
22  
21  
20  
2
+
V
LTC1064  
3
4
5
5k  
5k  
V+/2  
6
19  
AGND  
V
CLOCK INPUT  
+
7
18  
+
V
V
V
= 15V, TRIP VOLTAGE = 7V  
= 10V, TRIP VOLTAGE = 6.4V  
= 5V, TRIP VOLTAGE = 3V  
+
V
CLK  
+
+
1µF  
8
17  
16  
15  
14  
13  
0.1µF  
50/100  
9
10  
11  
12  
TO DIGITAL  
GROUND  
ANALOG  
GROUND  
PLANE  
1064 F01  
NOTE: PINS 5, 8, 20, IF NOT USED, SHOULD BE CONNECTED TO PIN 6  
Figure 1. Single Supply Operation  
1064fb  
6

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