Datasheet > LPC51U68JBD64

LPC51U68JBD64

更新时间： 2024-03-03 10:09:07

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
95页	3907K
描述
High-Performance, Power-Efficient and Cost Sensitive Arm^® Cortex^®-M0...

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LPC51U68JBD64 数据手册

LPC51U68

32-bit ARM Cortex-M0+ MCU; 96 KB SRAM; 256 KB flash,

Crystal-less USB operation, Flexcomm Interface, 32-bit

counter/ timers, SCTimer/PWM, 12-bit 5.0 Msamples/sec ADC,

Temperature sensor

Rev. 1.5 — 13 January 2020

Product data sheet

1. General description

The LPC51U68 are ARM Cortex-M0+ based microcontrollers for embedded applications.

These devices include 96 KB of on-chip SRAM, 256 KB on-chip flash, full-speed USB

device interface, an I2S, three general-purpose timers, one versatile timer with PWM and

many other capabilities (SCTimer/PWM), one RTC/alarm timer, one 24-bit Multi-Rate

Timer (MRT), a Windowed Watchdog Timer (WWDT), eight flexible serial communication

peripherals (each of which can be a USART, SPIs, or I²C interface), one 12-bit 5.0

Msamples/sec ADC, and a temperature sensor.

The LPC51U68 LQFP64 devices are pin-function compatible with LPC5410x and

LPC5411x devices in the same package/pinout versions.

2. Features and benefits

 ARM Cortex-M0+ processor, running at a frequency of up to 150 MHz.

 Single cycle multiplier.

 ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).

 Non-maskable Interrupt (NMI) with a selection of sources.

 Serial Wire Debug (SWD) with 4 breakpoints and 2 watchpoints.

 System tick timer.

 On-Chip memory:

 256 KB on-chip flash programming memory with flash accelerator and 256 Byte

page write and erase.

 Up to 96 KB total SRAM composed of up to 64 KB main SRAM, plus an additional

32 KB SRAM.

 ROM API support:

 Flash In-Application Programming (IAP) and In-System Programming (ISP).

 ROM-based USB drivers (HID, CDC, MSC, DFU). Flash updates via USB.

 Booting from valid user code in flash, USART, SPI, and I²C.

 Legacy, Single, and Dual image boot.

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