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LP87C51FC-20 PDF预览

LP87C51FC-20

更新时间: 2024-01-19 21:46:55
品牌 Logo 应用领域
英特尔 - INTEL 微控制器和处理器外围集成电路装置光电二极管可编程只读存储器时钟
页数 文件大小 规格书
18页 280K
描述
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

LP87C51FC-20 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:PLASTIC, DIP-40针数:40
Reach Compliance Code:unknown风险等级:5.79
Is Samacsys:N具有ADC:NO
其他特性:BOOLEAN PROCESSOR; ON-CIRCUIT EMULATION地址总线宽度:16
位大小:8边界扫描:NO
最大时钟频率:20 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:8
格式:FIXED POINT集成缓存:NO
JESD-30 代码:R-PDIP-T40长度:52.26 mm
低功率模式:YESDMA 通道数量:
外部中断装置数量:2I/O 线路数量:32
串行 I/O 数:1端子数量:40
计时器数量:3片上数据RAM宽度:8
片上程序ROM宽度:8最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not QualifiedRAM(字数):256
ROM(单词):32000ROM可编程性:OTPROM
座面最大高度:5.08 mm速度:20 MHz
最大压摆率:40 mA最大供电电压:5 V
最小供电电压:5 V标称供电电压:5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:15.24 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

LP87C51FC-20 数据手册

 浏览型号LP87C51FC-20的Datasheet PDF文件第2页浏览型号LP87C51FC-20的Datasheet PDF文件第3页浏览型号LP87C51FC-20的Datasheet PDF文件第4页浏览型号LP87C51FC-20的Datasheet PDF文件第6页浏览型号LP87C51FC-20的Datasheet PDF文件第7页浏览型号LP87C51FC-20的Datasheet PDF文件第8页 
AUTOMOTIVE 87C51FA/FB/FC/FC-20  
Port 2 emits the high-order address byte during  
fetches from external Program Memory and during  
accesses to external Data Memory that use 16-bit  
In normal operation ALE is emitted at a constant  
rate of (/6 the oscillator frequency, and may be used  
for external timing or clocking purposes. Note, how-  
ever, that one ALE pulse is skipped during each ac-  
cess to external Data Memory.  
@
addresses (MOVX  
DPTR). In this application it  
uses strong internal pullups when emitting 1’s. Dur-  
ing accesses to external Data Memory that use 8-bit  
@
addresses (MOVX  
of the P2 Special Function Register.  
Ri), Port 2 emits the contents  
Throughout the remainder of this data sheet, ALE  
will refer to the signal coming out of the ALE/PROG  
pin, and the pin will be referred to as the ALE/PROG  
pin.  
Some Port 2 pins receive the high-order address bits  
during EPROM programming and program verifica-  
tion.  
PSEN: Program Store Enable is the read strobe to  
external Program Memory.  
Port 3: Port 3 is an 8-bit bidirectional I/O port with  
internal pullups. The Port 3 output buffers can drive  
LS TTL inputs. Port 3 pins that have 1’s written to  
them are pulled high by the internal pullups, and in  
that state can be used as inputs. As inputs, Port 3  
pins that are externally pulled low will source current  
When the 87C51FA/FB/FC is executing code from  
external Program Memory, PSEN is activated twice  
each machine cycle, except that two PSEN activa-  
tions are skipped during each access to external  
Data Memory.  
(I , on the data sheet) because of the pullups.  
IL  
EA/V  
:
External Access enable. EA must be  
strapped to V in order to enable the device to  
PP  
Port 3 also serves the functions of various special  
features of the MCS-51 Family, as listed below:  
SS  
fetch code from external Program Memory locations  
0000H to 0FFFFH. Note, however, that if either of  
the Program Lock bits are programmed, EA will be  
internally latched on reset.  
Port Pin  
Alternate Function  
RXD (serial input port)  
TXD (serial output port)  
P3.0  
P3.1  
P3.2  
P3.3  
P3.4  
P3.5  
P3.6  
P3.7  
EA should be strapped to V  
executions.  
for internal program  
CC  
INT0 (external interrupt 0)  
INT1 (external interrupt 1)  
This pin also receives the programming supply volt-  
age (V ) during EPROM programming.  
PP  
T0 (Timer 0 external input)  
T1 (Timer 1 external input)  
WR (external data memory write strobe)  
RD (external data memory read strobe)  
XTAL1: Input to the inverting oscillator amplifier.  
XTAL2: Output from the inverting oscillator amplifier.  
RST: Reset input. A high on this pin for two machine  
cycles while the oscillator is running resets the de-  
vice. The port pins will be driven to their reset condi-  
OSCILLATOR CHARACTERISTICS  
tion when a minimum V  
oscillator is running or not. An internal pulldown re-  
sistor permits a power-on reset with only a capacitor  
is applied, whether the  
IH1  
XTAL1 and XTAL2 are the input and output, respec-  
tively, of an inverting amplifier which can be config-  
ured for use as an on-chip oscillator, as shown in  
Figure 4. Either a quartz crystal or ceramic resonator  
may be used. More detailed information concerning  
the use of the on-chip oscillator is available in Appli-  
cation Note AP-155, ‘‘Oscillators for Microcontrol-  
lers’’, and in Application Note AP-486, ‘‘Oscillator  
Design for Microcontrollers’’.  
connected to V  
.
CC  
ALE/PROG: Address Latch Enable output pulse for  
latching the low byte of the address during accesses  
to external memory. This pin (ALE/PROG) is also  
the program pulse input during EPROM program-  
ming for the 87C51FA/FB/FC.  
5

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