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LNK353G PDF预览

LNK353G

更新时间: 2024-01-22 05:20:50
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT 开关
页数 文件大小 规格书
16页 856K
描述
Enhanced, Energy Efficient, Low Power Off-Line Switcher IC

LNK353G 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.65
其他特性:REQUIRES AN AC SUPPLY OF 85 TO 265V模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制技术:PULSE WIDTH MODULATIONJESD-30 代码:R-PDIP-T7
JESD-609代码:e0长度:9.575 mm
功能数量:1端子数量:7
最高工作温度:125 °C最低工作温度:-40 °C
最大输出电流:0.4 A封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified表面贴装:NO
切换器配置:SINGLE最大切换频率:214 kHz
温度等级:AUTOMOTIVE端子面层:TIN LEAD
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

LNK353G 数据手册

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LNK353/354  
LinkSwitch-HF Layout Considerations  
Key Application Considerations  
LinkSwitch-HF Design Considerations  
See Figure 6 for a recommended circuit board layout for  
LinkSwitch-HF.  
Output Power Table  
Data sheet maximum output power table (Table 1) represents  
the maximum practical continuous output power level that can  
be obtained under the following assumed conditions:  
Single Point Grounding  
Use a single point ground connection from the input filter  
capacitor to the area of copper connected to the SOURCE  
pins.  
1. TheminimumDCinputvoltageis90Vorhigherfor85VAC  
input, or 240 V or higher for 230 VAC input or 115 VAC  
with a voltage doubler. The value of the input capacitance  
should be large enough to meet these criteria for AC input  
designs.  
Bypass Capacitor (CBP)  
TheBYPASSpincapacitorshouldbelocatedasnearaspossible  
to the BYPASS and SOURCE pins.  
2. Secondary output of 5.5 V with a Schottky rectifier diode.  
3. Assumed efficiency of 70%.  
Primary Loop Area  
The area of the primary loop that connects the input filter  
capacitor, transformer primary and LinkSwitch-HF together  
should be kept as small as possible.  
4. Operating frequency of fOSC(min) and ILIMIT(min)  
.
5. Voltage only output (no secondary side constant current  
circuit).  
6. Continuous mode operation (0.6 ≤ KP ≤ 1).  
7. The part is board mounted with SOURCE pins soldered  
to a sufficient area of copper to keep the SOURCE pin  
temperature at or below 100 °C.  
8. Ambient temperature of 50 °C for open frame designs  
and an internal enclosure temperature of 60 °C for adapter  
designs.  
Primary Clamp Circuit  
Aclamp is used to limit peak voltage on the DRAIN pin at turn  
off. This can be achieved by using an RCD clamp (as shown  
in Figure 5) or a Zener (~200 V) and diode clamp across the  
primary winding. In all cases, to minimize EMI, care should be  
taken to minimize the circuit path from the clamp components  
to the transformer and LinkSwitch-HF.  
Below a value of 1, KP is the ratio of ripple to peak primary  
current.Above a value of 1, KP is the ratio of primary MOSFET  
off time to the secondary diode conduction time.  
Thermal Considerations  
The copper area underneath the LinkSwitch-HF acts not only  
as a single point ground, but also as a heatsink. As this area is  
connectedtothequietsourcenode,thisareashouldbemaximized  
for good heatsinking of LinkSwitch-HF. The same applies to  
the cathode of the output diode.  
Operatingatalowereffectiveswitchingfrequencycansimplify  
meeting conducted and radiated EMI limits, especially for  
designs where the safety Y capacitor must be eliminated. By  
using a lower effective full load frequency, the calculated  
value of the primary inductance is higher than required for  
power delivery. However, the maximum power capability at  
this lower operating frequency will be lower than the values  
shown in Table 1.  
Y-Capacitor  
The placement of the Y-capacitor should be directly from  
the primary input filter capacitor positive terminal to the  
common/return terminal of the transformer secondary. Such  
a placement will route high magnitude common mode surge  
currents away from the LinkSwitch-HF device. Note that if an  
input π (C, L, C) EMI filter is used, then the inductor in the  
filter should be placed between the negative terminals of the  
input filter capacitors.  
Audible Noise  
The cycle skipping mode of operation used in LinkSwitch-HF  
can generate audio frequency components in the transformer.  
To limit this audible noise generation, the transformer should  
be designed such that the peak core flux density is below  
1250 Gauss (125 mT). Following this guideline and using the  
standard transformer production technique of dip varnishing  
practically eliminates audible noise. Higher flux densities  
are possible however, careful evaluation of the audible noise  
performance should be made using production transformer  
samples before approving the design.  
Optocoupler  
Place the optocoupler physically close to the LinkSwitch-HF to  
minimize the primary side trace lengths. Keep the high current,  
high voltage drain and clamp traces away from the optocoupler  
to prevent noise pick up.  
Output Diode  
For best performance, the area of the loop connecting the  
secondary winding, the output diode and the output filter  
capacitor should be minimized. In addition, sufficient copper  
area should be provided at the anode and cathode terminals  
Ceramic capacitors that use dielectrics such as Z5U, when used  
in clamp circuits, may also generate audio noise. If this is the  
case, try replacing them with a capacitor having a different  
dielectric, for example a polyester film type.  
F
2/05  
5

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