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LMX2615-MKT-MS PDF预览

LMX2615-MKT-MS

更新时间: 2023-09-03 20:33:09
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理
页数 文件大小 规格书
71页 1448K
描述
具有相位同步功能且 JESD204B 支持的航天级 40MHz 至 15GHz 宽带合成器 | HBD | 64 | 25 to 25

LMX2615-MKT-MS 技术参数

是否Rohs认证: 不符合生命周期:Active
包装说明:QFF, QFL64,.43SQ,20Reach Compliance Code:compliant
模拟集成电路 - 其他类型:PHASE LOCKED LOOPJESD-30 代码:S-CQFP-F64
长度:10.9 mm功能数量:1
端子数量:64封装主体材料:CERAMIC
封装代码:QFF封装等效代码:QFL64,.43SQ,20
封装形状:SQUARE封装形式:FLATPACK
座面最大高度:2.31 mm最大供电电压 (Vsup):3.45 V
最小供电电压 (Vsup):3.2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
端子形式:FLAT端子节距:0.5 mm
端子位置:QUAD宽度:10.9 mm
Base Number Matches:1

LMX2615-MKT-MS 数据手册

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LMX2615-SP  
www.ti.com.cn  
ZHCSIC4C JUNE 2018REVISED NOVEMBER 2018  
Pin Functions  
CQFP Package (QFN) Pin Functions  
PIN  
I/O  
TYPE  
DESCRIPTION  
NO.  
1
NAME  
NC  
I
No connection. Pin may be grounded or left unconnected.  
No connection. Pin may be grounded or left unconnected.  
Parallel pin control. This is the LSB.  
2
NC  
3
FS0  
FS1  
4
I
Parallel pin control  
Chip enable. In Pin Mode (not SPI Mode), rising edges presented to this pin activate  
the VCO calibration.  
5
CAL  
I
6
GND  
VbiasVCO  
GND  
I
Ground  
7
VCO bias. Requires connecting 10uF capacitor to ground. Place close to pin.  
8
Ground  
9
SYNC  
Phase synchronization input pin.  
10  
11  
GND  
Ground  
VccDIG  
Digital supply. Recommend connecting 0.1uF capacitor to ground.  
Complimentary Reference input clock pins. High input impedance. Requires connecting  
series capacitor (0.1 uF recommended).  
12  
13  
14  
OSCinP  
OSCinM  
VregIN  
I
I
Complimentary pin to OSCinP.  
Input reference path regulator decoupling. Requires connecting 1uF capacitor to  
ground. Place close to pin.  
15  
16  
17  
18  
19  
FS2  
FS3  
FS4  
FS5  
FS6  
I
I
I
I
I
Parallel pin control  
Parallel pin control  
Parallel pin control  
Parallel pin control  
Parallel pin control  
Parallel pin control. This is the MSB. Controls output state in pin mode. When this pin  
is low, only RFoutA is active, otherwise both outputs are active.  
20  
21  
22  
FS7  
I
VccCP  
CPout  
O
Charge pump supply. Recommend connecting 0.1uF capacitor to ground.  
Charge pump output. Recommend connecting C1 of loop filter close to charge pump  
pin.  
23  
24  
25  
26  
27  
28  
29  
GND  
GND  
I
Ground  
Ground  
Ground  
Ground  
VccMASH  
SCK  
Digital supply. Recommend connecting 0.1uF and 10uF capacitor to ground.  
SPI input clock. High impedance CMOS input. 1.8 – 3.3V logic.  
SPI input data. High impedance CMOS input. 1.8 – 3.3V logic.  
Ground  
SDI  
I
GND  
O
Ground  
RFoutBM  
Complementary pin for RFoutBP  
Differential output B Pair. Requires connecting a 50-Ω resistor pull-up to Vcc as close  
as possible to pin. Can be used as a synthesizer output or SYSREF output.  
30  
RFoutBP  
O
31  
32  
33  
34  
35  
36  
GND  
MUXout  
NC  
O
Ground  
Ground  
Multiplexed output pin. Can output: lock detect, SPI readback and diagnostics.  
No connection. Leave Unconnected  
O
VccBUF  
GND  
Output buffer supply. Requires connecting 0.1uF capacitor to ground.  
Ground  
Ground  
RFoutAM  
Complementary pin for RFoutAP  
Differential output B Pair. Requires connecting a 50-Ω resistor pull-up to Vcc as close  
as possible to pin.  
37  
RFoutAP  
O
38  
39  
40  
GND  
CSB  
GND  
I
Ground  
Ground  
SPI chip select bar. High impedance CMOS input. 1.8 – 3.3V logic.  
Ground  
Ground  
Copyright © 2018, Texas Instruments Incorporated  
5

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