LH7A400
NXP Semiconductors
32-Bit System-on-Chip
Table 3. Functional Pin List (Cont’d)
BGA LFBGA
RESET
STATE
STANDBY
STATE
OUTPUT
DRIVE
SIGNAL
DESCRIPTION
I/O NOTES
PIN
PIN
R11
N12
P12
T11
D3
P12
M10
R13
N11
E4
VDDA
Analog Power for PLL
VSSA
Analog Ground for PLL
Power On Reset
nPOR
Input
Input
No Change
No Change
I
I
3
3
User Reset; should be pulled HIGH for normal or
JTAG operation.
H6
D1
nURESET
D4
E4
C2
E2
F2
D2
WAKEUP
nPWRFL
nEXTPWR
Wake Up
Input
Input
Input
No Change
No Change
No Change
I
I
I
3
3
3
Power Fail Signal
External Power
14.7456 MHz Crystal Oscillator pins. An external
clock source can be connected to XTALIN leaving
XTALOUT open.
R13
T13
P16
P15
R14
R15
N14
M13
XTALIN
Input
HIGH
Input
No Change
HIGH
I
XTALOUT
XTAL32IN
XTAL32OUT
O
I
32.768 kHz Real Time Clock Crystal Oscillator
pins. An external clock source can be connected to
XTAL32IN leaving XTAL32OUT open.
No Change
No Change
Output
O
P14
J6
M12
J5
CLKEN
PGMCLK
nCS0
External Osc Clock Enable Output
Programmable Clock (14.7456 MHz MAX.)
Async Memory Chip Select 0
LOW
LOW
HIGH
HIGH
HIGH
LOW
8 mA
8 mA
O
O
O
O
O
LOW or HIGH
No Change
No Change
No Change
K11
K10
P13
P14
P16
N15
12 mA
12 mA
12 mA
nCS1
Async Memory Chip Select 1
nCS2
Async Memory Chip Select 2
nCS3/
nMMSPICS
• Async Memory Chip Select 3
• MultiMediaCard SPI Mode Chip Select
HIGH:
nCS3
M12
N16
No Change
12 mA
O
L12
M15
N13
L16
L15
L14
H11
K12
J15
L11
L13
L14
K11
L16
K14
J15
J12
J10
H16
H14
H11
G16
G9
D0
D1
D2
D3
D4
D5
D6
D7
D8
J13
D9
J10
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
H15
H13
G15
G11
G12
F15
F12
E14
D16
H10
D14
F10
A16
A14
B13
Data Bus
LOW
LOW
12 mA I/O
G14
G12
F15
E15
D16
F12
E13
D14
E12
B16
D12
A16
6
Rev. 01 — 16 July 2007
Preliminary data sheet