5秒后页面跳转
K7A401800M-QC14T PDF预览

K7A401800M-QC14T

更新时间: 2024-01-15 20:23:27
品牌 Logo 应用领域
三星 - SAMSUNG 时钟静态存储器内存集成电路
页数 文件大小 规格书
15页 403K
描述
Standard SRAM, 256KX18, 4ns, CMOS, PQFP100

K7A401800M-QC14T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QFP, QFP100,.63X.87Reach Compliance Code:unknown
风险等级:5.92最长访问时间:4 ns
最大时钟频率 (fCLK):138 MHzI/O 类型:COMMON
JESD-30 代码:R-PQFP-G100JESD-609代码:e0
内存密度:4718592 bit内存集成电路类型:STANDARD SRAM
内存宽度:18湿度敏感等级:3
端子数量:100字数:262144 words
字数代码:256000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256KX18输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP100,.63X.87封装形状:RECTANGULAR
封装形式:FLATPACK并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:2.5/3.3,3.3 V
认证状态:Not Qualified最大待机电流:0.03 A
最小待机电流:3.14 V子类别:SRAMs
最大压摆率:0.375 mA表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.635 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40

K7A401800M-QC14T 数据手册

 浏览型号K7A401800M-QC14T的Datasheet PDF文件第2页浏览型号K7A401800M-QC14T的Datasheet PDF文件第3页浏览型号K7A401800M-QC14T的Datasheet PDF文件第4页浏览型号K7A401800M-QC14T的Datasheet PDF文件第5页浏览型号K7A401800M-QC14T的Datasheet PDF文件第6页浏览型号K7A401800M-QC14T的Datasheet PDF文件第7页 
K7A401800M  
256Kx18 Synchronous SRAM  
Document Title  
256Kx18-Bit Synchronous Pipelined Burst SRAM  
Revision History  
Rev. No. History  
Draft Date  
Remark  
Preliminary  
Preliminary  
0.0  
0.1  
Initial draft  
February. 02. 1998  
February. 12. 1998  
Change DC characteristics VDD condition from VDD=3.3V+10%/-5% Change  
Input/output leackage currant from ±1mA to ±2mA  
Modify Read timing & Power down cycle timing.  
Change ISB2 value from 30mA to 20mA.  
Remove DC characteristics ISB1 - L ver. & ISB2 - L ver .  
Remove Low power version.  
Preliminary  
0.2  
Change Undershoot spec  
April. 14. 1998  
from -3.0V(pulse width£20ns) to -2.0V(pulse width£tCYC/2)  
Add Overshoot spec 4.6V((pulse width£tCYC/2)  
Change VIH max from 5.5V to VDD+0.5V  
Preliminary  
Preliminary  
0.3  
0.4  
Change ISB2 value from 20mA to 30mA.  
Change VDD condition from VDD=3.3V+10%/-5% to VDD=3.3V+0.3V/-0.165V.  
May. 13. 1998  
May. 14.1998  
Modify DC characteristics( Input Leakage Current test Conditions)  
form VDD=VSS to VDD to Max.  
Final  
Final  
1.0  
2.0  
Final spec Release  
May. 15. 1998  
Mar. 31. 1999  
Add VDDQ Supply voltage( 3.3V I/O)  
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the  
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-  
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.  
- 1 -  
March 1999  
Rev 2.0  

与K7A401800M-QC14T相关器件

型号 品牌 描述 获取价格 数据表
K7A401800M-QC15 SAMSUNG Standard SRAM, 256KX18, 3.8ns, CMOS, PQFP100

获取价格

K7A401800M-QC150 SAMSUNG Cache SRAM, 256KX18, 3.8ns, CMOS, PQFP100, 20 X 14 MM, TQFP-100

获取价格

K7A401800M-QC16 SAMSUNG Standard SRAM, 256KX18, 3.5ns, CMOS, PQFP100

获取价格

K7A401800M-QC160 SAMSUNG Cache SRAM, 256KX18, 3.5ns, CMOS, PQFP100, 20 X 14 MM, TQFP-100

获取价格

K7A401800M-QC16T SAMSUNG Standard SRAM, 256KX18, 3.5ns, CMOS, PQFP100

获取价格

K7A401800M-TC14 SAMSUNG Cache SRAM, 256KX18, 4ns, CMOS, PQFP100, 20 X 14 MM, TQFP-100

获取价格