Datasheet > K4E640812D-JL60

K4E640812D-JL60

更新时间： 2023-06-15 00:00:00

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器光电二极管
页数	文件大小	规格书
21页	416K
描述
EDO DRAM, 8MX8, 60ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32

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K4E640812D-JL60 数据手册

K4E660812D,K4E640812D

CMOS DRAM

8M x 8bit CMOS Dynamic RAM with Extended Data Out

DESCRIPTION

This is a family of 8,388,608 x 8 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random

access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Nor-

mal or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden

refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 8Mx8 EDO Mode DRAM family is fabricated using

Samsung¢s advanced CMOS process to realize high band-width, low power consumption and high reliability.

FEATURES

• Extended Data Out Mode operation

• CAS-before-RAS refresh capability

• RAS-only and Hidden refresh capability

• Self-refresh capability (L-ver only)

• Fast parallel test mode capability

• LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

• Part Identification

- K4E660812D-JC/L(3.3V, 8K Ref.)

- K4E640812D-JC/L(3.3V, 4K Ref.)

- K4E660812D-TC/L(3.3V, 8K Ref.)

- K4E640812D-TC/L(3.3V, 4K Ref.)

• Active Power Dissipation

Unit : mW

Speed

-45

432

396

360

• Available in Plastic SOJ and TSOP(II) packages

• +3.3V±0.3V power supply

324

288

252

-50

-60

• Refresh Cycles

FUNCTIONAL BLOCK DIAGRAM

Part

NO.

Refresh

cycle

Refresh time

Normal

L-ver

RAS

CAS

Vcc

Vss

Control

Clocks

K4E660812D*

K4E640812D

64ms

128ms

VBB Generator

* Access mode & RAS only refresh mode

: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)

CAS-before-RAS & Hidden refresh mode

Row Decoder

Refresh Timer

Refresh Control

Data in

Buffer

: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)

Memory Array

8,388,608 x 8

Cells

DQ0

DQ7

Refresh Counter

Row Address Buffer

Col. Address Buffer

¡Ü Performance Range:

Data out

Buffer

A0~A12

(A0~A11)*1

Speed

-45

tRAC

45ns

50ns

60ns

tCAC

12ns

13ns

15ns

tRC

tHPC

17ns

20ns

25ns

74ns

84ns

104ns

A0~A9

(A0~A10)*1

Column Decoder

-50

Note) *1 : 4K Refresh

-60

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

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