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K10P100M72SF1 PDF预览

K10P100M72SF1

更新时间: 2024-02-15 21:34:02
品牌 Logo 应用领域
飞思卡尔 - FREESCALE /
页数 文件大小 规格书
73页 1866K
描述
K10 Sub-Family

K10P100M72SF1 数据手册

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Document Number: K10P100M72SF1  
Rev. 2, 4/2012  
Freescale Semiconductor  
Data Sheet: Technical Data  
K10P100M72SF1  
K10 Sub-Family  
Supports: MK10DX128VLL7,  
MK10DX256VLL7, MK10DX128VML7,  
MK10DX256VML7  
Features  
Analog modules  
– Two 16-bit SAR ADCs  
– Programmable gain amplifier (PGA) (up to x64)  
integrated into each ADC  
– 12-bit DAC  
– Three analog comparators (CMP) containing a 6-bit  
DAC and programmable reference input  
– Voltage reference  
Operating Characteristics  
– Voltage range: 1.71 to 3.6 V  
– Flash write voltage range: 1.71 to 3.6 V  
– Temperature range (ambient): -40 to 105°C  
Clocks  
– 3 to 32 MHz crystal oscillator  
– 32 kHz crystal oscillator  
– Multi-purpose clock generator  
Timers  
– Programmable delay block  
– Eight-channel motor control/general purpose/PWM  
timer  
– Two 2-channel quadrature decoder/general purpose  
timers  
– Periodic interrupt timers  
– 16-bit low-power timer  
– Carrier modulator transmitter  
– Real-time clock  
System peripherals  
– 10 low-power modes to provide power optimization  
based on application requirements  
– 16-channel DMA controller, supporting up to 63  
request sources  
– External watchdog monitor  
– Software watchdog  
– Low-leakage wakeup unit  
Security and integrity modules  
– Hardware CRC module to support fast cyclic  
redundancy checks  
Communication interfaces  
– Controller Area Network (CAN) module  
– Two SPI modules  
– Two I2C modules  
– Five UART modules  
– I2S module  
– 128-bit unique identification (ID) number per chip  
Human-machine interface  
– Low-power hardware touch sensor interface (TSI)  
– General-purpose input/output  
Freescale reserves the right to change the detail specifications as may be  
required to permit improvements in the design of its products.  
© 2012 Freescale Semiconductor, Inc.  

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