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IR2010STRPBF PDF预览

IR2010STRPBF

更新时间: 2024-01-17 01:23:05
品牌 Logo 应用领域
英飞凌 - INFINEON /
页数 文件大小 规格书
17页 337K
描述
Floating channel designed for bootstrap operation

IR2010STRPBF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:7.26
高边驱动器:YES接口集成电路类型:HALF BRIDGE BASED MOSFET DRIVER
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:10.3 mm湿度敏感等级:1
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
标称输出峰值电流:3 A封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压:20 V最小供电电压:10 V
标称供电电压:15 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:TIN
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
断开时间:0.105 µs接通时间:0.135 µs
宽度:7.5 mmBase Number Matches:1

IR2010STRPBF 数据手册

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Data Sheet No. PD60195-E  
(S)(TR) & (PbF)  
IR2010  
HIGH AND LOW SIDE DRIVER  
Product Summary  
Features  
· Floating channel designed for bootstrap operation  
Fully operational to 200V  
V
200V max.  
Tolerant to negative transient voltage, dV/dt immune  
· Gate drive supply range from 10 to 20V  
· Undervoltage lockout for both channels  
· 3.3V logic compatible  
OFFSET  
I +/-  
O
3.0A / 3.0A typ.  
10 - 20V  
Separate logic supply range from 3.3V to 20V  
Logic and power ground ±5V offset  
V
OUT  
· CMOS Schmitt-triggered inputs with pull-down  
· Shut down input turns off both channels  
· Matched propagation delay for both channels  
· Outputs in phase with inputs  
t
95 & 65 ns typ.  
15 ns max.  
on/off  
Delay Matching  
· Also available LEAD-FREE  
Applications  
Packages  
· Audio Class D amplifiers  
· High power DC-DC SMPS converters  
· Other high frequency applications  
Description  
The IR2010 is a high power, high voltage, high speed power MOSFET and IGBT  
drivers with independent high and low side referenced output channels, ideal for  
Audio Class D and DC-DC converter applications. Logic inputs are compatible with  
standard CMOS or LSTTL output, down to 3.0V logic. The output drivers feature a high  
pulse current buffer stage designed for minimum driver cross-conduction. Propaga-  
tion delays are matched to simplify use in high frequency applications. The floating  
channel can be used to drive an N-channel power MOSFET or IGBT in the high side  
configuration which operates up to 200 volts. Proprietary HVIC and latch immune  
CMOS technologies enable ruggedized monolithic construction.  
14-Lead PDIP  
16-Lead SOIC  
200V  
Typical Connection  
HO  
VDD  
HIN  
SD  
VB  
VS  
VDD  
HIN  
SD  
TO  
LOAD  
LIN  
VSS  
VCC  
COM  
LO  
LIN  
VSS  
VCC  
(Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections  
only. Please refer to our Application Notes and DesignTips for proper circuit board layout.  
www.irf.com  
1

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