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IDT74FCT16646TPV8 PDF预览

IDT74FCT16646TPV8

更新时间: 2024-01-03 16:55:38
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管逻辑集成电路
页数 文件大小 规格书
9页 108K
描述
Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, SSOP-56

IDT74FCT16646TPV8 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:56
Reach Compliance Code:unknown风险等级:5.23
其他特性:WITH DIRECTION CONTROL系列:FCT
JESD-30 代码:R-PDSO-G56JESD-609代码:e0
长度:18.415 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:8
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH传播延迟(tpd):9 ns
认证状态:Not Qualified座面最大高度:2.794 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

IDT74FCT16646TPV8 数据手册

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FAST CMOS 16-BIT  
IDT54/74FCT16646T/AT/CT/ET  
BUS TRANSCEIVER/  
REGISTER (3-STATE)  
DESCRIPTION:  
FEATURES:  
The FCT16646T 16-bit registered transceiver is built using advanced  
dual metal CMOS technology. These high-speed, low-power devices are  
organized as two independent 8-bit bus transceivers with 3-state D-type  
registers. Thecontrolcircuitryisorganizedformultiplexedtransmissionof  
data between A bus and B bus either directly or from the internal storage  
registers. Each8-bittransceiver/registerfeaturesdirectioncontrol(xDIR),  
over-ridingOutputEnablecontrol(xOE)andSelectlines(xSABandxSBA)  
to select either real-time data or stored data. Separate clock inputs are  
provided for A and B port registers. Data on the A or B data bus, or both,  
can be stored in the internal registers by the low-to-high transitions at the  
appropriateclockpins. Flow-throughorganizationofsignalpinssimplifies  
layout. All inputs are designed with hysteresis for improved noise margin.  
TheFCT16646Tisideallysuitedfordrivinghigh-capacitanceloadsand  
low-impedancebackplanes.Theoutputbuffersaredesignedwithpoweroff  
disablecapabilitytoallow"liveinsertion"ofboardswhenusedasbackplane  
drivers.  
• 0.5 MICRON CMOS Technology  
• High-speed, low-power CMOS replacement for ABT functions  
• Typical tSK(o) (Output Skew) < 250ps  
• Low input and output leakage 1µA (max.)  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 5V ± 10%  
• High drive outputs (-32mA IOH, 64mA IOL)  
• Power off disable outputs permit “live insertion”  
• Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,  
TA = 25°C  
• Available in the following packages:  
– Industrial: SSOP, TSSOP  
– Military: CERPACK  
FUNCTIONALBLOCKDIAGRAM  
1OE  
2OE  
1DIR  
2DIR  
1CLKBA  
1SBA  
2CLKBA  
2SBA  
1CLKAB  
2CLKAB  
1SAB  
B REG  
D
2SAB  
B REG  
D
C
C
A REG  
1A1  
A REG  
1B1  
2B1  
2A1  
D
D
C
C
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
MILITARY AND INDUSTRIAL TEMPERATURE RANGES  
MAY 2002  
1
2002 Integrated Device Technology, Inc.  
DSC-5448/2  

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