Datasheet > I1820E-08SR

I1820E-08SR

更新时间： 2022-12-08 22:48:53

品牌	Logo	应用领域
ALSC		/
页数	文件大小	规格书
8页	61K
描述
Low Power Mobile VGA EMI Reduction IC

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数据手册

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I1820E-08SR 数据手册

P1818/19/20/21/22

Frequency vs. Deviation (P1818A and P1818H)

Deviation in P1818A

Deviation in P1818H

Frequency

SRS = 1

SRS = 0

D_C = 1

D_C = 0

10 MHz

15 MHz

20 MHz

-4.4%

-1.8%

-0.8%

-3.3%

-1.26%

-0.6%

-4.4%

-1.8%

-0.8%

±2.2%

±0.9%

±0.4%

Pin Description

number

Name

Type

Description

XIN

VSS

SRS

Connect to externally generated clock signal or crystal.

Ground Connection. Connect to system ground.

Spread Range Select. Digital logic input used to select frequency devi-

ation (see Spread Deviation Selections). This pin has an internal pull-

up resistor.

D_C

Digital logic input used to select Down (LOW) or Center (HIGH) Spread

Options (see Spread Deviation Selections). This pin has an internal

pull-up resistor.

ModOut

Spread Spectrum clock output (see Input Frequency and Modulation

Rate Selections and Spread Deviation Selections).

REF

FRS

Non-modulated reference output clock of the input frequency.

Frequency Range Select. Digital logic input used to select input fre-

quency range (see Input Frequency and Modulation Rate Selections).

This pin has an internal pull-up resistor.

5/6

PD#

Power-Down control pin. Pull LOW to enable Power-Down mode. This

pin has an internal pull-up resistor.

VDD

Connect to +3.3V

XOUT

Connect to crystal. No connect if externally generated clock signal is

used.

MRS

Modulation Rate Select. Digital logic input used to select Modulation

Rate (see Spread Deviation Selections). This pin has an internal pull-

up resistor.

1. Please refer to Figure 1 for pin assignment.

March 2003

4 of 8

Low Power Mobile VGA EMI Reduction IC

Notice: The information in this document is subject to change without notice.

1 2 345 6 7 8

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