HT45F4MA/HT45FH4MA/HT45FH4MA-1
Power Bank Flash MCU
Interrupts.......................................................................................................113
Inteꢂꢂupt Registeꢂs................................................................................................................113
Inteꢂꢂupt Registeꢂ Contents..................................................................................................113
Inteꢂꢂupt Opeꢂation...............................................................................................................118
Exteꢂnal Inteꢂꢂupt................................................................................................................. 120
OVP Inteꢂꢂupt ...................................................................................................................... 120
OCP Inteꢂꢂupt...................................................................................................................... 120
Multi-fun�tion Inteꢂꢂupt ........................................................................................................ 121
A/D Conveꢂteꢂ Inteꢂꢂupt....................................................................................................... 121
Tiꢀe Base Inteꢂꢂupts........................................................................................................... 121
EEPROM Inteꢂꢂupt .............................................................................................................. 123
LVD Inteꢂꢂupt....................................................................................................................... 123
TM Inteꢂꢂupts....................................................................................................................... 123
Inteꢂꢂupt Wake-up Fun�tion................................................................................................ 12ꢃ
Pꢂogꢂaꢀꢀing Consideꢂations.............................................................................................. 12ꢃ
Low Voltage Detector – LVD ....................................................................... 125
LVD Registeꢂ....................................................................................................................... 125
LVD Opeꢂation..................................................................................................................... 12ꢅ
Application Circuits..................................................................................... 127
Instruction Set.............................................................................................. 129
Intꢂodu�tion ......................................................................................................................... 129
Instꢂu�tion Tiꢀing................................................................................................................ 129
Moving and Tꢂansfeꢂꢂing Data............................................................................................. 129
Aꢂithꢀeti� Opeꢂations.......................................................................................................... 129
Logi�al and Rotate Opeꢂations............................................................................................ 130
Bꢂan�hes and Contꢂol Tꢂansfeꢂ ........................................................................................... 130
Bit Opeꢂations ..................................................................................................................... 130
Taꢁle Read Opeꢂations ....................................................................................................... 130
Otheꢂ Opeꢂations................................................................................................................. 130
Instruction Set Summary ............................................................................ 131
Taꢁle Conventions............................................................................................................... 131
Instruction Definition................................................................................... 133
Package Information ................................................................................... 142
1ꢅ-pin NSOP (150ꢀil) Outline Diꢀensions......................................................................... 1ꢃ3
20-pin SSOP (150ꢀil) Outline Diꢀensions......................................................................... 1ꢃꢃ
Rev. 1.20
5
De�eꢀꢁeꢂ 1ꢃꢄ 201ꢅ
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