HANBit
HSD64M64F8KA
Synchronous DRAM Module 512Mbyte (64Mx64bit), SMM, based on
32Mx8 ,4Banks, 4K Ref., 3.3V
Part No. HSD64M64F8KA
GENERAL DESCRIPTION
The HSD64M64F8KA is a 64M x 64 bit Synchronous Dynamic RAM high-density memory module. The module consists
of sixteen CMOS 32M x 8 bit with 4banks Synchronous DRAMs in TSOP-II 400mil packages on a 120-pin glass-epoxy.
One 0.22uF and two 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM.
The HSD64M64F8KA is a SMM(Stackable Memory Module type) .Synchronous design allows precise cycle control with
the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies,
programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory
system applications All module components may be powered from a single 3.3V DC power supply and all inputs and
outputs are LVTTL-compatible.
FEATURES
PIN ASSIGNMENT
• Part Identification
60-PIN P1 Connector
PIN Symbol PIN Symbol PIN
60-PIN P2 Connector
HSD64M64F8KA – 10L : 100MHz (CL=3)
HSD64M64F8KA – 10 : 100MHz (CL=2)
HSD64M64F8KA – 13 : 133MHz (CL=3)
• Burst mode operation
Symbol
PIN
Symbol
1
Vcc
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
Vcc
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Vss
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
Vss
1
Vss
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
Vss
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
Vss
DQM2
DQM3
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Vcc
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
Vcc
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
Vcc
2
2
3
3
• Auto & self refresh capability (8192Cycles/64ms)
• LVTTL compatible inputs and outputs
• Single 3.3V ±0.3V power supply
• MRS cycle with address key programs
- Latency (Access from column address)
- Burst length (1, 2, 4, 8 & Full page)
- Data scramble (Sequential & Interleave)
4
4
5
5
6
6
7
7
8
8
9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
Vcc
DQM4
DQM5
NC
CKE0
CKE1
Vcc
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Vss
DQM0
DQM1
/WE
CLK0
CLK1
Vss
• All inputs are sampled at the positive going
edge of the system clock
• The used device is stacked 8M x 8bit x 4Banks
SDRAM
DQM6
DQM7
A12
A11
A9
A8
A7
A6
A5
A4
NC
NC
/CS1
/CS2
Vcc
/CAS
/RAS
/CS1
/CS2
Vss
Vss
Vcc
URL:www.hbe.co.kr
1
HANBit Electronics Co.,Ltd.
REV. 1.0 (August, 2002)