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HSC

更新时间： 2024-01-09 21:22:08

品牌	Logo	应用领域
禾伸堂 - HOLYSTONECAPS		电容器
页数	文件大小	规格书
4页	219K
描述
High Temperature and Large Size Multilayer Ceramic Chip Capacitors

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HSC Series-Stacked Capacitors

Holy Stone

High Temperature and Large Size Multilayer Ceramic Chip Capacitors

[High Temperature / Large Stacked Capacitors]

HSC Series

MLCC Design, Suitable for Switchmode Power Supply Filters

Features

Application

High CV MLCC design, effectively can replace Tantalum

and Aluminum electolytics

Inherently low ESR.

Down Hole Applications

Jet Engine Control

Power supplies

N leads for through hole applications and J or L lead

configuration for surface mount with stress relief against

board flexure and thermal excursions.

High reliability testing available including space level

screening.

DC-DC converters

Surge protection

Industrial control circuits

Snubbers

Filtering, smoothing, and decoupling application

HIREL applications

Custom sizes and values available--contact factory for

details or to define your needs.

Custom applications

Summary of Specification

Operating Temperature

Rated Voltage

-55 to +175 Ԩ

50Vdc to 500Vdc

Temperature Coefficient of

Capacitance

NPO : ≤ ± 30ppm/ Ԩ , -55 to +125 Ԩ (EIA Class Ι )

X8R : ≤ ± 15%

, -55 to +150 Ԩ (EIA Class Ⅱ )

Capacitance Range

Dissipation Factor :

NPO: 70nF to 9.0uF

X8R : 460nF to 220uF

NPO : Q

1000 at 1KHz

X8R : 2.5%max. at 1KHz

Insulation Resistance

Aging

10GΩ or 500/C Ω whichever is smaller

NPO : 0% , X8R : 2.5% per decade of time

Dielectric Withstanding Voltage

V ≤50V

100V ≤ V <500V ; 200% Rated Voltage

500V ≤ V ; 150% Rated Voltage

± 1% & ± 2% tolerances are only available in NPO

; 250% Rated Voltage

Tolerance

How To Order

501

Rated

HSC

224

Product

Code

Stack and

Size

Lead

Configuration

Material

Capacitance Tolerance

(pF)

Packaging

Special Test Special

Requirement Requirement

Voltage

HSC:

High

Temperature stack

and Large

The first digit: Ex.:

# of chips in J :J Lead

Ex.:

N: NPO

H: X8R

Ex.:

B: Bulk

W: Waffle

pack

Blank:

Standard

electrical test requirement

Hi-Rel

Testing

Blank:

No special

103:10x10³

224:22x10⁴

475:47x10⁵

F: +/-1.0% 050:50Vdc

G: +/-2.0% 101:100Vdc

J: +/-5.0%

K: +/- 10% 501:500Vdc

M: +/- 20%

L :L Lead

N:Straight

Lead

201:200Vdc

01~99:

Customer

special

Size

Second Digit:

Multilayer

Ceramic

Chip

Chip Size

requirement

Capacitor

Revision date : 2010.07.16

- 1 -

12 3 4

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