Datasheet > HS45116GM-25/883

HS45116GM-25/883

更新时间： 2024-01-13 12:07:51

品牌	Logo	应用领域
英特矽尔 - INTERSIL		振荡器外围集成电路时钟
页数	文件大小	规格书
6页	147K
描述
Numerically Controlled Oscillator/Modulator

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HS45116GM-25/883 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	PGA	包装说明：	PGA,
针数：	145	Reach Compliance Code：	compliant
ECCN代码：	3A001.A.2.C	HTS代码：	8542.39.00.01
风险等级：	5.92	Is Samacsys：	N
边界扫描：	NO	最大时钟频率：	25.6 MHz
外部数据总线宽度：	19	JESD-30 代码：	S-CPGA-P145
JESD-609代码：	e0	长度：	39.75 mm
低功率模式：	YES	端子数量：	145
最高工作温度：	125 °C	最低工作温度：	-55 °C
输出数据总线宽度：	20	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	PGA	封装形状：	SQUARE
封装形式：	GRID ARRAY	峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified	筛选级别：	MIL-STD-883
座面最大高度：	5.2 mm	最大供电电压：	5.5 V
最小供电电压：	4.5 V	标称供电电压：	5 V
表面贴装：	NO	技术：	CMOS
温度等级：	MILITARY	端子面层：	TIN LEAD
端子形式：	PIN/PEG	端子节距：	2.54 mm
端子位置：	PERPENDICULAR	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	39.75 mm	uPs/uCs/外围集成电路类型：	DSP PERIPHERAL, NUMERIC CONTROLLED OSCILLATOR
Base Number Matches：	1

HS45116GM-25/883 数据手册

HSP45116/883

Data Sheet

May 1999

FN2813.3

Numerically Controlled

Oscillator/Modulator

Features

• This Circuit is Processed in Accordance to MIL-STD-883

and is Fully Conformant Under the Provisions of

Paragraph 1.2.1.

The Intersil HSP45116/883 combines a high performance

quadrature numerically controlled oscillator (NCO) and a high

speed 16-bit Complex Multiplier/Accumulator (CMAC) on a

single IC. This combination of functions allows a complex

vector to be multiplied by the internally generated (cos, sin)

vector for quadrature modulation and demodulation. As shown

in the Block Diagram, the HSP45116/883 is divided into three

main sections. The Phase/Frequency Control Section (PFCS)

and the Sine/Cosine Section together form a complex NCO.

The CMAC multiplies the output of the Sine/Cosine Section

with an external complex vector.

• NCO and CMAC on One Chip

• 15MHz and 25.6MHz Versions

• 32-Bit Frequency Control

• 16-Bit Phase Modulation

• 16-Bit CMAC

• 0.006Hz Tuning Resolution at 25.6MHz

• Spurious Frequency Components < -90dBc

• Fully Static CMOS

The inputs to the Phase/Frequency Control Section consist

of a microprocessor interface and individual control lines.

The phase resolution of the PFCS is 32 bits, which results in

frequency resolution better than 0.006Hz at 25.6MHz. The

output of the PFCS is the argument of the sine and cosine.

The spurious free dynamic range of the complex sinusoid is

greater than 90dBc.

Applications

• Frequency Synthesis

• Modulation - AM, FM, PSK, FSK, QAM

• Demodulation, PLL

The output vector from the Sine/Cosine Section is one of the

inputs to the Complex Multiplier/Accumulator. The CMAC mul-

tiplies this (cos, sin) vector by an external complex vector and

can accumulate the result. The resulting complex vectors are

available through two 20-bit output ports which maintain the

90dB spectral purity. This result can be accumulated internally

to implement an accumulate and dump filter.

• Phase Shifter

• Polar to Cartesian Conversions

Ordering Information

TEMP.

RANGE ( C)

PKG.

NO.

PART NUMBER

HSP45116GM-15/883

HS45116GM-25/883

PACKAGE

A quadrature down converter can be implemented by

loading a center frequency into the Phase/Frequency

Control Section. The signal to be downconverted is the

Vector Input of the CMAC, which multiplies the data by the

rotating vector from the Sine/Cosine Section. The resulting

complex output is the down converted signal.

-55 to 125 145 Ld PGA

G145.A

Block Diagram

VECTOR INPUT

SINE/

COSINE

ARGUMENT

MICROPROCESSOR

PHASE/

SIN

INTERFACE

SINE/

COSINE

SECTION

FREQUENCY

CMAC

CONTROL

COS

INDIVIDUAL

SECTION

CONTROL SIGNALS

VECTOR OUTPUT

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.

12 3 4 5 6

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