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HMC674LC3C PDF预览

HMC674LC3C

更新时间: 2024-01-22 17:12:30
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
14页 340K
描述
HMC674LC3C

HMC674LC3C 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:QFN
包装说明:HQCCN,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.8
Is Samacsys:N放大器类型:COMPARATOR
JESD-30 代码:S-CQCC-N16JESD-609代码:e4
长度:3 mm标称负供电电压 (Vsup):-3 V
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出类型:PUSH-PULL封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:HQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.45 mm
子类别:Comparator供电电压上限:4 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Gold (Au) - with Nickel (Ni) barrier
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:3 mmBase Number Matches:1

HMC674LC3C 数据手册

 浏览型号HMC674LC3C的Datasheet PDF文件第2页浏览型号HMC674LC3C的Datasheet PDF文件第3页浏览型号HMC674LC3C的Datasheet PDF文件第4页浏览型号HMC674LC3C的Datasheet PDF文件第5页浏览型号HMC674LC3C的Datasheet PDF文件第6页浏览型号HMC674LC3C的Datasheet PDF文件第7页 
9.3 GHz Latched Comparator  
with RSPECL Output Stage  
HMC674LC3C/HMC674LP3E  
Data Sheet  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
HMC674LC3C/HMC674LP3E  
Equivalent input bandwidth: 9.3 GHz typical  
Propagation delay: 85 ps typical  
Overdrive and slew rate dispersion: 10 ps typical  
Input signal minimum pulse width: 60 ps typical  
Resistor programmable hysteresis  
Differential latch control  
Power dissipation: 140 mW typical  
VTP  
INP  
1
2
3
4
12  
11  
10  
9
V
CCO  
50Ω  
50Ω  
Q
Q
INN  
VTN  
V
CCO  
16-terminal, 3 mm × 3 mm, ceramic leadless chip carrier (LCC)  
16-lead lead frame chip scale package (LFCSP)  
PACKAGE  
BASE  
V
EE  
APPLICATIONS  
Figure 1. HMC674LC3C/HMC674LP3E Functional Block Diagram  
Automatic test equipment (ATE) applications  
High speed instrumentation  
Digital receiver systems  
Pulse spectroscopy  
High speed trigger circuits  
Clock and data restoration  
GENERAL DESCRIPTION  
The HMC674LC3C/HMC674LP3E are silicon germanium  
(SiGe), monolithic, ultrafast comparators that feature reduced  
swing positive emitter-coupled logic (RSPECL) output drivers  
and latch inputs. These comparators support 10 Gbps operation  
and provide 85 ps propagation delay and an input signal  
minimum pulse width of 60 ps with 0.2 ps rms of random jitter  
(RJ). Overdrive and slew rate dispersion is typically 10 ps, making  
the HMC674LC3C/HMC674LP3E ideal for a wide range of  
applications from ATE to broadband communications. The  
RSPECL output stages directly drive 400 mV into a 50 Ω resistor  
terminated to VTT = (VCCO − 2.0 V), where VTT is the PECL  
termination voltage (see Figure 16). The HMC674LC3C/  
HMC674LP3E feature a high speed latch and programmable  
hysteresis. These devices can operate in either latch mode or as  
a tracking comparator.  
Rev. K  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2016 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 
 

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