HMC624LP4 / 624LP4E
v02.0807
0.5 dB LSB GaAs MMIC 6-BIT
DIGITAL ATTENUATOR, DC - 6 GHz
Serial Mode
The serial mode is enabled then P/S is set to high. Data is entered LSB first and after the 6th shift clock cycle the LE
(Latch Enable) is pulsed High and then Low. See timing diagram below for reference.
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Timing Diagram
Timing
Timing Diagram (Latched Parallel Mode)
Vdd = +5V
(Typ.)
Parameter
Symbol
Units
ns
Serial Input Setup Time
ts
th
20
20
Hold Time from Serial
Input to Shift Clock
ns
Setup Time from Shift
Clock to Latch Enable
tlsup
40
ns
Propagation Delay
tpd
10
10
ns
ns
Setup Time for New Data
tsnd
Parallel Mode (Direct Parallel Mode & Latched Parallel Mode)
Direct Parallel Mode - The attenuation state is changed by the Control Voltage Inputs directly. The LE (Latch Enable)
must be at a logic high to control the attenuator in this manner.
Latched Parallel Mode - The attenuation state is selected using the Control Voltage Inputs and set while the LE is in
the Low state. The attenuator will not change state while LE is Low. Once all Control Voltage Inputs are at the desired
states the LE is pulsed. See timing diagram below for reference.
For price, delivery, and to place orders, please contact Hittite Microwave Corporation:
20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373
Order On-line at www.hittite.com
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