HMC624LP4 / 624LP4E
v09.0210
0.5 dB LSB GaAs MMIC 6-BIT
DIGITAL ATTENUATOR, DC - 6 GHz
Worst Case Step Error
8
IP3 vs. Temperature[2]
Between Successive Attenuation States[2]
1
80
0.8
0.6
8 dB
0.4
70
60
50
40
30
0.2
0
-0.2
4 dB
-0.4
-0.6
16 dB
-0.8
-1
0
1
2
3
4
5
6
0
1
2
3
4
5
6
FREQUENCY (GHz)
FREQUENCY (GHz)
Serial Control Interface
The HMC624LP4E contains a 3-wire SPI compatible digital interface (SERIN, CLK, LE). The serial control interface
is activated when P/S is kept high. The 6-bit serial word must be loaded MSB first. The positive-edge sensitive CLK
and LE requires clean transitions. If mechanical switches are used, sufficient debouncing should be provided. When
LE is high, 6-bit data in the serial input register is transferred to the attenuator. When LE is high CLK is masked to
prevent data transition during output loading.
When P/S is low, 3-wire SPI interface inputs (SERIN, CLK, LE) are disabled and the input register is loaded with
parallel digital inputs (D0-D5). When LE is high, 6-bit parallel data changes the state of the part per truth table.
For all modes of operations, the state will stay constant while LE is kept low.
For price, delivery and to place orders: Hittite Microwave Corporation, 20 Alpha Road, Chelmsford, MA 01824
Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
8 - 3
Application Support: Phone: 978-250-3343 or apps@hittite.com