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HDMP-1646 PDF预览

HDMP-1646

更新时间: 2024-01-28 01:58:01
品牌 Logo 应用领域
安捷伦 - AGILENT 以太网
页数 文件大小 规格书
15页 326K
描述
Gigabit Ethernet Transceiver Chip

HDMP-1646 技术参数

生命周期:Transferred包装说明:QFP,
Reach Compliance Code:unknownECCN代码:5A991.B.4.A
HTS代码:8542.39.00.01风险等级:5.83
JESD-30 代码:S-PQFP-G64长度:14 mm
功能数量:1端子数量:64
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装形状:SQUARE封装形式:FLATPACK
认证状态:Not Qualified座面最大高度:2.35 mm
标称供电电压:3.3 V表面贴装:YES
电信集成电路类型:ETHERNET TRANSCEIVER温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD宽度:14 mm

HDMP-1646 数据手册

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Gigabit Ethernet Transceiver Chip  
Preliminary Technical Data  
HDMP-1636 Transceiver  
HDMP-1646 Transceiver  
Features  
provides complete Serialize/  
Deserialize for copper transmis-  
sion, incorporating both the  
Gigabit Ethernet transmit and  
receive functions into a single  
device.  
• IEEE 802.3z Gbit Ethernet  
Compatible, Supports 1250  
MBd Gigabit Ethernet  
• Based on X3T11 “10 Bit  
Specification”  
• Low Power Consumption  
This chip is used to build a high  
speed interface (as shown in  
Figure 1) while minimizing board  
space, power and cost. It is  
compatible with the IEEE 802.3z  
specification.  
• Transmitter and Receiver  
Functions Incorporated onto  
a Single IC  
• Two Package Sizes  
Available:  
– 10 mm PQFP (HDMP-1636)  
– 14 mm PQFP (HDMP-1646)  
• 10-Bit Wide Parallel TTL  
Compatible I/Os  
The receiver section accepts a  
serial electrical data stream at  
1250 MBd and recovers the  
original 10-bit wide parallel data.  
The receiver PLL locks onto the  
incoming serial signal and  
recovers the high speed serial  
clock and data. The serial data is  
converted back into 10-bit  
The transmitter section accepts  
10-bit wide parallel TTL data and  
multiplexes this data into a high  
speed serial data stream. The  
parallel data is expected to be  
8B/10B encoded data, or equiv-  
alent. This parallel data is latched  
into the input register of the  
transmitter section on the rising  
edge of the 125 MHz reference  
clock (used as the transmit byte  
clock).  
• Single +3.3 V Power Supply  
• 5-Volt Tolerant I/Os  
• 2 KV ESD Protection  
parallel data, recognizing the  
8B/10B comma character to  
establish byte alignment.  
Applications  
• 1250 MBd Gigabit Ethernet  
Interface  
• High Speed Proprietary  
Interface  
The recovered parallel data is  
presented to the user at TTL  
compatible outputs. The receiver  
section also recovers two 62.5  
MHz receiver byte clocks which  
are 180 degrees out of phase  
with each other. The parallel data  
is properly aligned with the rising  
edge of alternating clocks.  
The transmitter section’s PLL  
locks to this user supplied 125  
MHz byte clock. This clock is  
then multiplied by 10, to gener-  
ate the 1250 MHz serial signal  
clock used to generate the high  
speed output. The high speed  
outputs are capable of interfacing  
directly to copper cables for  
electrical transmission or to a  
separate fiber optic module for  
optical transmission.  
• Backplane Serialization  
• Bus Extender  
Description  
The HDMP-1636/46 transceiver is  
a single silicon bipolar integrated  
circuit packaged in a plastic QFP  
package. It provides a low-cost,  
low-power physical layer solution  
for 1250 MBd Gigabit Ethernet or  
proprietary link interfaces. It  
For test purposes, the transceiver  
provides for on-chip local loop-  
back functionality, controlled  
through an external input pin.  
Additionally, the byte  
(5/97)  
711  

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