Datasheet > HCS245MS

HCS245MS

更新时间： 2024-02-17 15:28:19

品牌	Logo	应用领域
英特矽尔 - INTERSIL		总线收发器
页数	文件大小	规格书
7页	182K
描述
Radiation Hardened Octal Bus Transceiver, Three-State, Non-Inverting

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技术参数
数据手册

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HCS245MS 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.72
逻辑集成电路类型：	BUS TRANSCEIVER	Base Number Matches：	1

HCS245MS 数据手册

HCS245MS

Radiation Hardened

Octal Bus Transceiver, Three-State, Non-Inverting

December 1992

Features

Pinouts

20 PIN CERAMIC DUAL-IN-LINE

• 3 Micron Radiation Hardened CMOS SOS

• Total Dose 200K or 1 Mega-RAD(Si)

• Latch-Up Free Under Any Conditions

MIL-STD-1835 DESIGNATOR CDIP2-T20, LEAD FINISH C

TOP VIEW

VCC

DIR

• Fanout (Over Temperature Range)

- Bus Driver Outputs - 15 LSTTL Loads

• Military Temperature Range: -55^oC to +125^oC

• Signiﬁcant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• LSTTL Input Compatibility

- VIL = 0.8V Max

- VIH = VCC/2 Min

• Input Current Levels Ii ≤ 5µA at VOL, VOH

GND

Description

20 PIN CERAMIC FLAT PACK

MIL-STD-1835 DESIGNATOR CDFP4-F20, LEAD FINISH C

TOP VIEW

The Intersil HCS245MS is a Radiation Hardened Non-Invert-

ing Octal Bidirectional Bus Transceiver, Three-State,

intended for two-way asynchronous communication between

data busses. The HCS245MS allows data transmission from

the A bus to the B bus or from the B bus to the A bus. The

logic level at the direction input (DIR) determines the data

direction. The output enable input (OE) puts the I/O port in

the high-impedance state when high.

VCC

DIR

The HCS245MS utilizes advanced CMOS/SOS technology

to achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS245MS is supplied in a 20 lead Weld Seal Ceramic

ﬂatpack (K sufﬁx) or a Weld Seal Ceramic Dual-In-Line

Package (D sufﬁx).

GND

Functional Diagram

Truth Table

ONE OF 8 TRANSCEIVERS

CONTROL

INPUTS

A DATA

DIR

OPERATION

B Data to A Bus

A Data to B Bus

Isolation

(2, 3, 4, 5,

6, 7, 8)

B DATA

(18, 17, 16, 15,

14, 13, 12)

TO OTHER

7 BUFFERS

H = High Voltage Level, L = Low Voltage Level,

X = Immaterial

DIR

To prevent excess currents in the High-Z (Isolation)

modes, all I/O terminals should be terminated with 10kΩ

to 1MΩ resistors.

OUTPUT

ENABLE

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 2468.1

7-475

12 3 4 5 6 7

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