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H0700KC17P PDF预览

H0700KC17P

更新时间: 2024-01-18 02:41:31
品牌 Logo 应用领域
IXYS 栅极
页数 文件大小 规格书
15页 319K
描述
Symmetrical GTO SCR, 700A I(T)RMS, 1700V V(DRM), 510V V(RRM), 1 Element

H0700KC17P 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:DISK BUTTON, O-CXDB-X4
Reach Compliance Code:unknownHTS代码:8541.30.00.80
风险等级:5.8配置:SINGLE
最大直流栅极触发电流:1500 mAJESD-30 代码:O-CXDB-X4
元件数量:1端子数量:4
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装形状:ROUND
封装形式:DISK BUTTON峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified最大均方根通态电流:700 A
断态重复峰值电压:1700 V重复峰值反向电压:510 V
表面贴装:YES端子形式:UNSPECIFIED
端子位置:UNSPECIFIED处于峰值回流温度下的最长时间:NOT SPECIFIED
触发设备类型:SYMMETRICAL GTO SCRBase Number Matches:1

H0700KC17P 数据手册

 浏览型号H0700KC17P的Datasheet PDF文件第3页浏览型号H0700KC17P的Datasheet PDF文件第4页浏览型号H0700KC17P的Datasheet PDF文件第5页浏览型号H0700KC17P的Datasheet PDF文件第7页浏览型号H0700KC17P的Datasheet PDF文件第8页浏览型号H0700KC17P的Datasheet PDF文件第9页 
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0700KC17#  
2.5 Gate trigger characteristics.  
These are measured by slowly ramping up the gate current and monitoring the transition of anode current  
and voltage (see diagram 7). Maximum and typical data of gate trigger current, for the full junction  
temperature range, is given in the curves of figure 6. Only typical figures are given for gate trigger voltage,  
however, the curves of figure 1 give the range of gate forward characteristics, for the full allowable  
junction temperature range. The curves of figures 1 & 6 should be used in conjunction, when considering  
forward gate drive circuit requirement. The gate drive requirements should always be calculated for lowest  
junction temperature start-up condition.  
Feedback  
Anode current  
0.9VAK  
R1  
Not to scale  
Current-  
sence  
CT  
Gate current  
C1  
Vs  
0.1IA  
IGT  
Anode-Cathode  
Voltage  
DUT  
Gate-drive  
Diagram 7, Gate trigger circuit and waveforms.  
2.6 Turn-on characteristics  
The basic circuit used for turn-on tests is given in diagram 8. The test is initiated by establishing a  
circulating current in Tx, resulting in VD appearing across Cc/Lc. When the test device is fired Cc/Lc  
discharges through DUT and commutates Tx off, as pulse from Cc/Lc decays the constant current source  
continues to supply a fixed current to DUT. Changing value of Cc & Lc allows adjustment of ITM and di/dt  
respectively, VD and i are also adjustable.  
Lc  
Cc  
R1  
CT  
Tx  
D
i
Cd  
Vd  
DUT  
Gate-drive  
Diagram 8, Turn-on test circuit of FT40.  
The definitions of turn-on parameters used in the characteristic data are given in diagram 9. The gate  
circuit conditions IGM & IG are fully adjustable, IGM duration 10µs.  
diG/dt  
IG  
IGM  
td  
tr  
di/dt  
ITM  
VD  
VD=VDM  
tgt  
Eon integral  
period  
Diagram 9, Turn-on wave-diagrams.  
Data Sheet. Type H0700KC17# Issue 1  
Page 6 of 15  
April, 2004  

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