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H0500KC25N PDF预览

H0500KC25N

更新时间: 2023-01-03 05:18:48
品牌 Logo 应用领域
IXYS /
页数 文件大小 规格书
15页 179K
描述
Silicon Controlled Rectifier, 280 A, 2500 V, SYMMETRICAL GTO SCR

H0500KC25N 数据手册

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WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
Characteristics  
UNITS  
V
Parameter  
MIN  
TYP MAX TEST CONDITIONS  
VTM  
IL  
Maximum peak on-state voltage  
Latching current  
-
2.8  
5
3.2 IG=2A, IT=500A  
-
-
-
Tj=25°C  
A
IH  
Holding current  
-
5
Tj=25°C  
A
dv/dtcr Critical rate of rise of off-state voltage  
800  
-
-
VD=80%VDRM, VGR=-2V  
Rated VDRM, VGR=-2V  
Rated VRRM  
V/µs  
mA  
mA  
mA  
V
IDM  
Peak off state current  
-
-
-
-
-
-
-
-
-
-
30  
60  
IRM  
Peak reverse current  
-
IGKM  
Peak negative gate leakage current  
-
200 VGR=-16V  
0.9  
0.8  
0.7  
1.7  
0.6  
0.1  
-
-
-
Tj=-40°C  
Tj=25°C  
Tj=125°C  
VGT  
Gate trigger voltage  
Gate trigger current  
V
VD=25V, RL=25m  
VD=25V, RL=25m  
V
6.0 Tj=-40°C  
Tj=25°C  
0.5 Tj=125°C  
A
IGT  
2
A
A
VD=50%VDRM, ITGQ=500A, IGM=30A, diG/dt=15A/µs  
Tj=25°C, di/dt=300A/µs, (10%IGM to 90%VD)  
µs  
td  
tgt  
tf  
Delay time  
Turn-on time  
Fall time  
-
-
-
0.5  
2.0  
0.5  
-
3.0 Conditions as for td, (10%IGM to 10%VD)  
µs  
µs  
VD=80%VDRM, ITGQ=500A, CS=1µF,  
-
diGQ/dt=40A/µs, VGR=-16V, (90%ITGQ to 10%IVD)  
tgq  
Turn-off time  
-
5.0  
6.0 Conditions as for tf, (10%IGQ to 10%ITGQ  
Conditions as for tf  
600 Conditions as for tf  
)
µs  
A
Igq  
Turn-off gate current  
Turn-off gate charge  
Tail time  
-
180  
-
Qgq  
ttail  
tgw  
-
-
500  
µC  
µs  
35  
50  
-
Conditions as for tf, (10%ITGQ to ITGQ<1A)  
Conditions as for tf  
Gate off-time (see note 3)  
80  
-
-
µs  
-
0.065 Double side cooled  
0.24 Cathode side cooled  
0.09 Anode side cooled  
9.0 (see note 2)  
-
K/W  
K/W  
K/W  
kN  
g
RthJK  
Thermal resistance junction to sink  
-
-
-
-
-
F
Mounting force  
Weight  
4.5  
-
Wt  
120  
Notes:-  
1) Unless otherwise indicated Tj=125oC.  
2) For other clamping forces, consult factory.  
3) The gate off-time is the period during which the gate circuit is  
required to remain low impedance to allow for the passage  
of tail current.  
Data Sheet. Type H0500KC25# Issue 2  
Page 2 of 15  
August, 2004  

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