Pin Description
Microwire Interface
AtypicalcommunicationontheMicrowirebusismadethroughthe
CS, SK, DI and DO signals. To facilitate various operations on the
Memoryarray,asetof7instructionsareimplementedonFM93C46.
The format of each instruction is listed under Table 1.
Chip Select (CS)
This is an active high input pin to FM93C46 EEPROM (the device)
and is generated by a master that is controlling the device. A high
level on this pin selects the device and a low level deselects the
device. All serial communications with the device is enabled only
when this pin is held high. However this pin cannot be permanently
tied high, as a rising edge on this signal is required to reset the
internal state-machine to accept a new cycle and a falling edge to
initiateaninternalprogrammingafterawritecycle.Allactivityonthe
SK, DI and DO pins are ignored while CS is held low.
Instruction
Each of the 7 instructions is explained under individual instruction
descriptions.
Start bit
This is a 1-bit field and is the first bit that is clocked into the device
whenaMicrowirecyclestarts.Thisbithastobe“1”foravalidcycle
to begin. Any number of preceding “0” can be clocked into the
device before clocking a “1”.
Serial Clock (SK)
Thisisaninputpintothedeviceandisgeneratedbythemasterthat
is controlling the device. This is a clock signal that synchronizes the
communicationbetweenamasterandthedevice. Allinputinforma-
tion(DI)tothedeviceislatchedontherisingedgeofthisclockinput,
whileoutputdata(DO)fromthedeviceisdrivenfromtherisingedge
of this clock input. This pin is gated by CS signal.
Opcode
This is a 2-bit field and should immediately follow the start bit.
These two bits (along with 2 MSB of address field) select a
particular instruction to be executed.
Serial Input (DI)
Address Field
This is an input pin to the device and is generated by the master
that is controlling the device. The master transfers Input informa-
tion (Start bit, Opcode bits, Array addresses and Data) serially via
this pin into the device. This Input information is latched on the
rising edge of the SCK. This pin is gated by CS signal.
This is a 6-bit field and should immediately follow the Opcode bits.
In FM93C46, all 6 bits are used for address decoding during
READ, WRITE and ERASE instructions. During all other instruc-
tions, the MSB 2 bits are used to decode instruction (along with
Opcode bits).
Serial Output (DO)
Data Field
This is an output pin from the device and is used to transfer Output
data via this pin to the controlling master. Output data is serially
shifted out on this pin from the rising edge of the SCK. This pin is
active only when the device is selected.
This is a 16-bit field and should immediately follow the Address
bits. Only the WRITE and WRALL instructions require this field.
D15 (MSB) is clocked first and D0 (LSB) is clocked last (both
during writes as well as reads).
Table 1. Instruction set
Instruction
READ
Start Bit Opcode Field
Address Field
Data Field
1
1
1
1
1
1
1
10
00
01
00
00
11
00
A5 A4 A3 A2 A1 A0
WEN
1
1
X
X
X
X
WRITE
WRALL
WDS
A5 A4 A3 A2 A1 A0
D15-D0
D15-D0
0
0
1
0
X
X
X
X
X
X
X
X
ERASE
ERAL
A5 A4 A3 A2 A1 A0
1
0
X
X
X
X
5
www.fairchildsemi.com
FM93C46 Rev. D.1
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