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FAN7080-GF085 PDF预览

FAN7080-GF085

更新时间: 2022-02-26 12:23:37
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
17页 391K
描述
Half Bridge Gate Driver

FAN7080-GF085 数据手册

 浏览型号FAN7080-GF085的Datasheet PDF文件第1页浏览型号FAN7080-GF085的Datasheet PDF文件第2页浏览型号FAN7080-GF085的Datasheet PDF文件第3页浏览型号FAN7080-GF085的Datasheet PDF文件第5页浏览型号FAN7080-GF085的Datasheet PDF文件第6页浏览型号FAN7080-GF085的Datasheet PDF文件第7页 
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
VS  
Parameter  
Min.  
VB-25  
-0.3  
Max.  
VB+0.3  
625  
Unit  
V
High-Side Floating Offset Voltage  
VB  
High-Side Floating Supply Voltage  
High-Side Floating Output Voltage  
Low -Side Floating Output Voltage  
Supply Voltage  
V
VHO  
VLO  
VS-0.3  
-0.3  
VB+0.3  
Vcc+0.3  
25  
V
V
VCC  
VIN  
-0.3  
V
Input Voltage f or IN  
-0.3  
VCC+0.3  
+1  
V
(1)  
I
IN  
Input Injection Current  
mA  
W
(2.3)  
PD  
θJA  
TJ  
Pow er Dissipation  
0.625  
200  
(2)  
Thermal Resistance, Junction to Ambient  
Junction Temperature  
°C/W  
°C  
°C  
150  
TSTG  
Storage Temperature  
-55  
150  
Human Body Model (HBM)  
Charge Device Model (CDM)  
1000  
500  
ESD  
V
Notes:  
1. Guaranteed by design. Full function, no latchup. Tested at 10 V and 17 V.  
2. The Thermal Resistance and pow er dissipation rating are measured per below conditions:  
JESD51-2: Integral circuits thermal test method environmental conditions, natural convection/Still Air  
JESD51-3: Low effective thermal conductivity test board for leaded surface-mount packages.  
3. Do not exceed pow er dissipation (PD) under any circumstances.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance. ON Semiconductor does not recommend  
exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
Parameter  
Min.  
Max.  
Unit  
(4)  
VB  
High-Side Floating Supply Voltage (DC) Transient: -10 V at 0.1 µS  
VS+6  
VS+20  
V
High-Side Floating Supply Offset Voltage (DC)  
Transient: -25 V(max.) at 0.1 µS at VBS < 25 V  
VS  
-5  
600  
V
VHO  
VLO  
VCC  
VIN  
High-Side Output Voltage  
Low -Side Output Voltage  
Supply Voltage for Logic Input  
Logic Input Voltage  
VS  
0
VB  
VCC  
20  
V
V
5.5  
0
V
VCC  
50  
V
(5)  
dv/dt  
TPULSE  
FS  
Allow able Offset Voltage Slew Rate  
V/nS  
nS  
KHz  
°C  
(5,6)  
Minimum Pulse Width  
1100  
-40  
(6)  
Sw itching Frequency  
200  
125  
TA  
Operating Ambient Temperature  
Notes:  
4. The VS offset is tested w ith all supplies based at 15 V differential  
5. Guaranteed by design.  
6. When VDT = 1.2 V. Refer to Figures 5, 6, 7 and 8.  
www.onsemi.com  
4
 
 
 
 
 
 

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