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FAN5033 PDF预览

FAN5033

更新时间: 2024-01-15 06:09:48
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 控制器
页数 文件大小 规格书
39页 874K
描述
8-Bit Programmable, 2- to 3-Phase, Synchronous Buck Controller

FAN5033 技术参数

生命周期:Not Recommended零件包装代码:QFN
包装说明:HVQCCN,针数:32
Reach Compliance Code:unknown风险等级:5.69
其他特性:ALSO OPERATES IN ADJUSTABLE MODE FROM 0.5V TO 1.6V模拟集成电路 - 其他类型:SWITCHING CONTROLLER
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:14.4 V最小输入电压:9.6 V
标称输入电压:12 VJESD-30 代码:S-XQCC-N32
长度:5 mm功能数量:1
端子数量:32最高工作温度:85 °C
最低工作温度:封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE座面最大高度:0.8 mm
表面贴装:YES切换器配置:SINGLE
最大切换频率:4500 kHz温度等级:OTHER
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:5 mm
Base Number Matches:1

FAN5033 数据手册

 浏览型号FAN5033的Datasheet PDF文件第1页浏览型号FAN5033的Datasheet PDF文件第2页浏览型号FAN5033的Datasheet PDF文件第4页浏览型号FAN5033的Datasheet PDF文件第5页浏览型号FAN5033的Datasheet PDF文件第6页浏览型号FAN5033的Datasheet PDF文件第7页 
Pin Assignment  
Figure 2: Pin Assignment  
Pin Definitions  
Pin #  
Name  
Description  
Power Supply Enable Input. Analog comparator input with hysteresis. If input voltage  
is higher than the internal threshold, the controller is enabled. If lower, the controller is  
disabled.  
1
EN  
Power Good Output. Open drain output that pulls to GND when the output voltage is  
outside the proper operating range.  
2
3
PWRGD  
FBRTN  
Feedback Return. VID DAC and Error Amplifier reference for remote sensing of output  
voltage.  
Feedback Input. Error amplifier input for remote sensing of output voltage. A positive  
internal current source is connected to this pin to allow the output voltage to be offset  
lower than the DAC voltage.  
4
FB  
5
6
COMP  
SS  
Error Amplifier Output. For loop compensation.  
Soft-Start Input. An external capacitor connected between this pin and GND sets the  
soft-start ramp-up time.  
Delay Timer Input. An external capacitor connected between this pin and GND sets the  
over-current latch-off delay time, BOOT voltage hold time, EN delay time, and PWRGD  
delay time.  
7
DELAY  
Current Limit Set. An external resistor from this pin to GND sets the current limit  
threshold of the converter.  
8
9
ILIMIT  
RT  
Frequency Set Input. An external resistor connected between this pin and GND sets  
the oscillator frequency of the device.  
PWM Ramp Set Input. An external resistor connected between this pin and the  
converter input voltage sets the internal PWM ramp.  
10  
RAMPADJ  
Current Sense Amplifier Positive Input. The voltage on this pin is used as the  
reference for the current sense amplifier. The Power Good and Crowbar functions are  
also internally connected to this pin.  
11  
CSREF  
12  
13  
CSSUM  
Current Sense Amplifier Negative Input.  
CSCOMP  
Current Sense Amplifier Compensation Output.  
© 2006 Fairchild Semiconductor 2006  
FAN5033 Rev. 1.0.0  
www.fairchildsemi.com  
3 of 39  

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