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FAN3228CMX PDF预览

FAN3228CMX

更新时间: 2024-02-16 18:57:34
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器栅极栅极驱动
页数 文件大小 规格书
24页 1302K
描述
Dual 2A High-Speed, Low-Side Gate Drivers

FAN3228CMX 数据手册

 浏览型号FAN3228CMX的Datasheet PDF文件第1页浏览型号FAN3228CMX的Datasheet PDF文件第2页浏览型号FAN3228CMX的Datasheet PDF文件第4页浏览型号FAN3228CMX的Datasheet PDF文件第5页浏览型号FAN3228CMX的Datasheet PDF文件第6页浏览型号FAN3228CMX的Datasheet PDF文件第7页 
FAN3226  
FAN3227  
FAN3228  
FAN3229  
Figure 4. Pin Configurations (Repeated)  
Pin Definitions  
Name  
Pin Description  
Enable Input for Channel A. Pull pin low to inhibit driver A. ENA has TTL thresholds for both TTL and  
CMOS INx threshold.  
ENA  
ENB  
Enable Input for Channel B. Pull pin low to inhibit driver B. ENB has TTL thresholds for both TTL and  
CMOS INx threshold.  
GND  
INA  
Ground. Common ground reference for input and output circuits.  
Input to Channel A.  
INA+ Non-Inverting Input to Channel A. Connect to VDD to enable output.  
INA-  
INB  
Inverting Input to Channel A. Connect to GND to enable output.  
Input to Channel B.  
INB+ Non-Inverting Input to Channel B. Connect to VDD to enable output.  
INB-  
Inverting Input to Channel B. Connect to GND to enable output.  
OUTA Gate Drive Output A: Held low unless required input(s) are present and VDD is above UVLO threshold.  
OUTB Gate Drive Output B: Held low unless required input(s) are present and VDD is above UVLO threshold.  
Gate Drive Output A (inverted from the input): Held low unless required input is present and VDD is  
OUTA  
above UVLO threshold.  
Gate Drive Output B (inverted from the input): Held low unless required input is present and VDD is  
above UVLO threshold.  
OUTB  
Thermal Pad (MLP only). Exposed metal on the bottom of the package; may be left floating or connected  
to GND; NOT suitable for carrying current.  
P1  
VDD  
Supply Voltage. Provides power to the IC.  
Output Logic  
FAN3228 and FAN3229  
FAN3226 (x=A or B)  
FAN3227 (x=A or B)  
(x=A or B)  
ENx  
INx  
ENx  
INx  
OUTx  
INx+  
INx  
OUTx  
OUTx  
0
0
1(7)  
0
0
1
0
0
0(7)  
0
0
0
1
0(7)  
0(7)  
1
0
1(7)  
0
0
1
0
0
0
1
1(7)  
1(7)  
0
1(7)  
1(7)  
1(7)  
0(7)  
1
0
1(7)  
1
Note:  
7. Default input signal if no external connection is made.  
© 2007 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN3226 / FAN3227 / FAN3228 / FAN3229 • Rev. 1.0.3  
3

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