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FAN3121C

更新时间： 2024-02-23 05:03:25
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器栅极栅极驱动
页数 文件大小 规格书
12页 459K
描述
Application Review and Comparative Evaluation of Low-Side Gate Drivers

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FAN3121C 技术参数

是否无铅：不含铅生命周期：Active
包装说明：SOP, SOP8,.25Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.31.00.01
Factory Lead Time：1 week风险等级：1.39
Is Samacsys：N内置保护：UNDER VOLTAGE
高边驱动器：NO接口集成电路类型：BUFFER OR INVERTER BASED MOSFET DRIVER
JESD-30 代码：R-PDSO-G8JESD-609代码：e4
长度：5 mm湿度敏感等级：1
功能数量：1端子数量：8
最高工作温度：125 °C最低工作温度：-40 °C
输出电流流向：SOURCE AND SINK封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：12 V
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：MOSFET Drivers最大压摆率：0.9 mA
最大供电电压：18 V最小供电电压：4.5 V
标称供电电压：12 V表面贴装：YES
温度等级：AUTOMOTIVE端子面层：Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
断开时间：0.035 µs接通时间：0.035 µs
宽度：4 mmBase Number Matches：1

FAN3121C 数据手册

 浏览型号FAN3121C的Datasheet PDF文件第1页浏览型号FAN3121C的Datasheet PDF文件第3页浏览型号FAN3121C的Datasheet PDF文件第4页浏览型号FAN3121C的Datasheet PDF文件第5页浏览型号FAN3121C的Datasheet PDF文件第6页浏览型号FAN3121C的Datasheet PDF文件第7页 
AN-6069  
APPLICATION NOTE  
The circuit waveforms for a MOSFET turning on into a  
clamped inductive load are illustrated in Figure 2.  
During interval t1, IG increases quickly and charges the  
combination of CGS and CGD to the gate threshold voltage  
TH through the path shown in Figure 3(a). In this interval,  
V
the MOSFET carries no inductor current.  
As interval t2 begins, the MOSFET starts to conduct current  
in the linear mode as:  
VDD  
VGS  
ID = gm(VGS − VTH )  
(1)  
VPL  
VTH  
through the current paths shown in Figure 3(b). The parallel  
combination of CGD and CGS are charged from the threshold  
voltage to a plateau level given by  
IL  
ID  
VPL  
=
+ VTH  
(2)  
IDS  
gm  
as the drain current rises from zero to IL. QGS2 is the charge  
needed during this transition and can be determined from the  
MOSFET datasheet characteristic curves, as illustrated in  
the application example presented later in this section. QGS2  
allows calculation of the time required for this transition as:  
VO  
VDS  
IPK  
QGS2  
t2 = tIDS,rise  
=
IG  
(3)  
IG  
IPL  
Throughout t2, VDS remains at VOUT, clamped by diode D.  
At the end of t2, the MOSFET conducts the full IL current  
and the diode commutates.  
t1 t2  
t3  
t4  
time  
Figure 2. MOSFET Turn on with Inductive Load  
As interval t3 commences, the gate current flows through  
Figure 3 indicates the gate current paths active during the  
individual intervals of the MOSFET turn -on process.  
CGD and the MOSFET channel as shown in Figure 3(c). All  
of IG is used to discharge CGD as VGS remains at VPL, and  
V
DS begins to fall with a time period given by:  
QGD  
t3 = tVDS,fall  
=
(4)  
IG  
In interval t4, IG flows through a combination of CGS, CGD  
and the decreasing channel resistance RDS, as shown in  
Figure 3(d). During t4, the gate-source voltage rises from  
the plateau level to VDD. This allows determination of the  
total gate charge QG,T required to turn on the MOSFET.  
,
As the drain current rises during t2 and VDS falls during t3,  
the MOSFET has simultaneous high voltage across it and  
high current flowing through it, so the instantaneous power  
can be very high. An equation relating IG to the switching  
loss during the turn on interval is:  
⎛
⎞
⎟
⎟
⎠
V ×I  
QGS2 QGD  
⎛
⎜
⎞
⎟
IN  
LOAD  
⎜
PSW,ON  
=
(
f
)
+
(5)  
SW  
⎜
2
IG,t2  
IG,t3  
⎝
⎠
⎝
Figure 3. Current Paths During MOSFET Turn on  
This equation shows the importance of the magnitude of IG  
in relation to the switching losses. Unfortunately, there are  
no formal equations to calculate the current available from a  
given driver as the output voltage swings throughout its  
range. Empirical methods can determine the value of IG at  
different driver output voltage levels and are presented in  
the section “Evaluating Drivers on the Bench” below.  
RG represents the series combination of the MOSFET  
internal gate resistance along with any series gate resistor.  
HI represents the driver’s internal resistance whose  
effective value changes throughout the switching interval.  
As shown below, the driver current, IG, is determined by  
combining information presented in references [1] and [2].  
R
© 2007 Fairchild Semiconductor Corporation  
Rev. 1.0.3 • 1/6/10  
www.fairchildsemi.com  
2
1234567...12

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