Datasheet > EPA030D

EPA030D

更新时间： 2024-01-30 22:30:32

品牌	Logo	应用领域
EXCELICS		栅
页数	文件大小	规格书
2页	93K
描述
High Performance Heterojunction Dual-Gate FET

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技术参数
数据手册

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EPA030D 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84
Base Number Matches：	1

EPA030D 数据手册

EPA030D

UPDATED 11/30/2004

High Performance Heterojunction Dual-Gate FET

FEATURES

•

+18.0 dBm OUTPUT POWER AT 1dB COMPRESSION

19.5 dB POWER GAIN AT 12GHz

0.3 x 300 MICRON RECESSED “MUSHROOM” DUAL GATE

Si₃N₄PASSIVATION

ADVANCED EPITAXIAL DOPING PROFILE PROVIDES

EXTRA HIGH PERFORMANCE AND HIGH RELIABILITY

MIXER, SWITCH, AGC AND TEMPERATURE

COMPENSATION APPLICATIONS

•

Idss SORTED IN 5mA PER BIN RANGE

Chip Thickness: 75 ± 13 microns

All Dimensions In Microns

Caution! ESD sensitive device.

ELECTRICAL CHARACTERISTICS (T_a= 25°C)

SYMBOL

PARAMETERS/TEST CONDITIONS¹

MIN

15.0

17.5

TYP

18.0

19.5

1.2

MAX

UNITS

dBm

Output Power at 1dB Compression

P_1dB

V_DS= 6V, I_DS≈ 50% I_DSS,V_{G2S =}0V

f = 12GHz

Gain at 1dB Compression

V_DS= 6V, I_DS≈ 50% I_DSS,V_{G2S =}0V

G_1dB

Noise Figure

_DS= 3V, I_DS≈ 15mA_,V_{G2S =}0V

Associated Gain

V_DS= 3V, I_DS≈ 15mA_,V_{G2S =}0V

17.5

I_DSS

G_M

Saturated Drain Current

Transconductance

Pinch-off Voltage

_DS= 3V, V_G1S= V_G2S= 0 V

115

_DS= 3V, V_G1S= -0.5V_,V_G2S= 0 V

V_P1

V_P2

_DS= 3V, I_DS= 1.0mA_,V_G2S= 0 V

_DS= 3V, I_DS= 1.0mA_,V_G1S= 0 V

-1.5

-3.5

Pinch-off Voltage

Gate 2 to Drain Breakdown Voltage

_G2D= 1.0mA_,Gate 1 Open

Gate 1 to Source Breakdown Voltage

_G1S= 1.0mA_,Gate 2 Open

BV_G2D

-10

-6

-14

BV_G1S

R_TH

-12

^oC/W

Thermal Resistance

125

Specifications are subject to change without notice.

Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085

Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com

page 1 of 2

Revised December 2004

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