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EP4CE15F23C7 PDF预览

EP4CE15F23C7

更新时间: 2023-04-15 00:00:00
品牌 Logo 应用领域
英特尔 - INTEL
页数 文件大小 规格书
44页 663K
描述
Field Programmable Gate Array, 963 CLBs, 472.5MHz, 15408-Cell, PBGA484, 23 X 23 MM, 1 MM PITCH, FBGA-484

EP4CE15F23C7 技术参数

是否Rohs认证:符合生命周期:Active
包装说明:BGA, BGA484,22X22,40Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:1.34
Is Samacsys:N最大时钟频率:472.5 MHz
JESD-30 代码:S-PBGA-B484JESD-609代码:e1
长度:23 mm湿度敏感等级:3
可配置逻辑块数量:963输入次数:346
逻辑单元数量:15408输出次数:346
端子数量:484最高工作温度:85 °C
最低工作温度:组织:963 CLBS
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA484,22X22,40封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):260
电源:1.2,1.2/3.3,2.5 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:2.4 mm
子类别:Field Programmable Gate Arrays最大供电电压:1.25 V
最小供电电压:1.15 V标称供电电压:1.2 V
表面贴装:YES温度等级:OTHER
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:40宽度:23 mm
Base Number Matches:1

EP4CE15F23C7 数据手册

 浏览型号EP4CE15F23C7的Datasheet PDF文件第2页浏览型号EP4CE15F23C7的Datasheet PDF文件第3页浏览型号EP4CE15F23C7的Datasheet PDF文件第4页浏览型号EP4CE15F23C7的Datasheet PDF文件第6页浏览型号EP4CE15F23C7的Datasheet PDF文件第7页浏览型号EP4CE15F23C7的Datasheet PDF文件第8页 
Chapter 1: Cyclone IV Device Datasheet  
1–5  
Operating Conditions  
Table 1–3. Recommended Operating Conditions for Cyclone IV E Devices (1), (2) (Part 2 of 2)  
Symbol  
IDiode  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
mA  
Magnitude of DC current across  
PCI-clamp diode when enable  
10  
Notes to Table 1–3:  
(1) Cyclone IV E 1.0 V core voltage devices only support C8L, C9L, and I8L speed grades. Cyclone IV E 1.2 V core voltage devices only support  
C6, C7, C8, I7, and A7 speed grades.  
(2) VCCIO for all I/O banks must be powered up during device operation. All VCCA pins must be powered to 2.5 V (even when PLLs are not used)  
and must be powered up and powered down at the same time.  
(3) VCC must rise monotonically.  
(4) VCCIO powers all input buffers.  
(5) The POR time for Standard POR ranges between 50 and 200 ms. Each individual power supply must reach the recommended operating range  
within 50 ms.  
(6) The POR time for Fast POR ranges between 3 and 9 ms. Each individual power supply must reach the recommended operating range within  
3 ms.  
Table 1–4. Recommended Operating Conditions for Cyclone IV GX Devices (Part 1 of 2)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Core voltage, PCIe hard IP block, and  
transceiver PCS power supply  
(3)  
VCCINT  
1.16  
1.2  
1.24  
V
(1), (3)  
VCCA  
VCCD_PLL  
PLL analog power supply  
PLL digital power supply  
2.375  
1.16  
2.5  
1.2  
2.625  
1.24  
V
V
(2)  
I/O banks power supply for 3.3-V  
operation  
3.135  
2.85  
3.3  
3
3.465  
3.15  
V
V
V
V
V
V
V
V
V
V
V
I/O banks power supply for 3.0-V  
operation  
I/O banks power supply for 2.5-V  
operation  
2.375  
1.71  
2.5  
1.8  
1.5  
1.2  
3.3  
3
2.625  
1.89  
(3), (4)  
VCCIO  
I/O banks power supply for 1.8-V  
operation  
I/O banks power supply for 1.5-V  
operation  
1.425  
1.14  
1.575  
1.26  
I/O banks power supply for 1.2-V  
operation  
Differential clock input pins power  
supply for 3.3-V operation  
3.135  
2.85  
3.465  
3.15  
Differential clock input pins power  
supply for 3.0-V operation  
Differential clock input pins power  
supply for 2.5-V operation  
2.375  
1.71  
2.5  
1.8  
1.5  
2.625  
1.89  
VCC_CLKIN  
(3), (5), (6)  
Differential clock input pins power  
supply for 1.8-V operation  
Differential clock input pins power  
supply for 1.5-V operation  
1.425  
1.575  
Differential clock input pins power  
supply for 1.2-V operation  
1.14  
1.2  
2.5  
1.26  
V
V
VCCH_GXB  
Transceiver output buffer power supply  
2.375  
2.625  
March 2016 Altera Corporation  
Cyclone IV Device Handbook,  
Volume 3  

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