EM9304
Proprietary API
Bluetooth 4.2 Stac k
Analog I/O
Power Management
Future
Security
RF / MODEM
Support:
(RN G, AES)
Interrupt
4/4/12k DRAM
Proprietary
(Data /Retention)
Controller
BT 5.0 2Mbps
Ant+
8k DRAM
32-bit
HCI
ZigBee
(Data /No Retention)
MC/FPU/CRC
48k IRAM
136k ROM
Bluetooth 5.0
Link Layer
(Instruction)
(Bo ot, Link Layer, Stac k)
128k OTP
4k IRAM
(Prof iles, Main)
(Jump Table)
Scheduler/Memory Manager
Hardware Drivers
Digital I/O
a)
b)
Figure 3: a) Hardware Architecture, b) Software Architecture
1.3 RF Description
The RF transceiver exceeds the specifications and requirements of the Bluetooth 5.0 PHY specification.
The main features of the RF transceiver are the following:
•
•
Ultra-low-power: The peak current in receive mode is 3.0 mA and in transmit mode is 5.2mA at
0.4dBm and 3.0V in DCDC Step-Down Configuration at room temperature.
Excellent RF performance: including -94dBm sensitivity for 1Mbps operation with 37 byte
payload and a programmable output power range from -34dBm to +6.1dBm
Low-voltage: Operation from 3.6V down to 1.05V
•
•
Very high degree of integration: small footprint with few external components
The RF transceiver block diagram is shown in Figure 4.
Frequency
Synthesizer
PA
LNA
ADC
RSSI
Bus
Figure 4: RF Transceiver Block Diagram
The RF transceiver is based on a low-IF architecture and comprises the following building blocks:
•
•
•
•
•
•
Single-ended 50 Ohm RF port with on-chip harmonic filter
High gain, low power, LNA and mixer
Power Amplifier with programmable output power range
Low-IF receiver with 5th order channel filter and ADC converter
Fully integrated frequency synthesis with fast settling time and digital modulation
48MHz XTAL reference with finely trimmable internal loading capacitor
8
www.emmicroelectronic.com
Copyright 2017, EM Microelectronic-Marin SA
9304-DS, Version 4.1, 30-Oct-17