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DT1240A-04LP PDF预览

DT1240A-04LP

更新时间： 2023-12-06 20:10:48
品牌 Logo 应用领域
美台 - DIODES /
页数 文件大小 规格书
6页 450K
描述
4-CHANNEL LOW CAPACITANCE ESD PROTECTION ARRAY

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中文翻译

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DT1240A-04LP 数据手册

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DT1240A-04LP  
Marking Information  
QE5 = Product Type Marking Code  
YWX = Date Code Marking  
Y = Year (ex: 1 = 2021)  
QE5 = Product Type Marking Code  
YM = Date Code Marking  
Y = Year (ex: I = 2021)  
YM  
QE5  
QE5 YWX  
W = Week  
M = Month (ex: 9 = September)  
(ex: a = Week 27; z Represents Week 52 and 53)  
X = Internal Code (ex: U = Monday)  
Date Code Key for YM  
Year  
2016  
…
2021  
2022  
2023  
2024  
2025  
2026  
2027  
2028  
2029  
2030  
Code  
D
…
I
J
K
L
M
N
O
P
R
S
Month  
Code  
Jan  
Feb  
Mar  
Apr  
May  
Jun  
Jul  
Aug  
Sep  
Oct  
Nov  
Dec  
1
2
3
4
5
6
7
8
9
O
N
D
Date Code Key for YWX  
Year  
2016  
…
2021  
2022  
2023  
2024  
2025  
2026  
2027  
2028  
2029  
2030  
Code  
6
…
1
2
3
4
5
6
7
8
9
0
Week  
Code  
1-26  
27-52  
53  
A-Z  
a-z  
z
Internal Code  
Code  
Sun  
Mon  
Tue  
Wed  
Thu  
Fri  
Sat  
T
U
V
W
X
Y
Z
Maximum Ratings (@TA = +25°C, unless otherwise specified.)  
Characteristic  
Peak Pulse Current, per IEC 61000-4-5  
Peak Pulse Power, per IEC 61000-4-5  
Operating Voltage (DC)  
Symbol  
IPP  
Value  
Unit  
A
Condition  
5.5  
52  
I/O to VSS, 8/20µs  
I/O to VSS, 8/20µs  
I/O to VSS  
W
PPP  
3.6  
V
VDC  
ESD Protection – Contact Discharge, per IEC 61000-4-2  
±14  
kV  
VESD_CONTACT  
VESD_AIR  
TOP  
I/O to VSS  
ESD Protection – Air Discharge, per IEC 61000-4-2  
Operating Temperature  
±16  
kV  
°C  
°C  
I/O to VSS  
-55 to +85  
-55 to +150  
—
Storage Temperature  
—
TSTG  
Thermal Characteristics  
Characteristic  
Power Dissipation Typical (Note 5)  
Symbol  
Value  
Unit  
mW  
350  
360  
PD  
Thermal Resistance, Junction to Ambient Typical (Note 5)  
°C/W  
RθJA  
Electrical Characteristics (@TA = +25°C, unless otherwise specified.)  
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
Test Condition  
Reverse Working Voltage  
—
—
3.3  
V
—
VRWM  
Reverse Current  
—
5
—
—
1.0  
—
μA  
V
IR  
VBR  
VR = 3.3V, I/O to VSS  
Reverse Breakdown Voltage  
Forward Clamping Voltage  
Reverse Clamping Voltage (Note 6)  
ESD Clamping Voltage  
Dynamic Reverse Resistance  
Dynamic Forward Resistance  
Channel Input Capacitance  
Delta CI/O  
IR = 1mA, I/O to VSS  
-1.0  
—
—
—
—
—
—
-0.85  
8.2  
—
V
VF  
IF = -15mA, I/O to VSS  
9.5  
—
V
VC  
IPP = 5.5A, I/O to VSS, 8/20µs  
TLP, 10A, tP = 100ns, I/O to VSS  
TLP, 10A, tP = 100ns, I/O to VSS  
TLP, 10A, tP = 100ns, VSS to I/O  
VI/O = 2.5V, VSS = 0V, f = 1MHz  
CI/OMAX-CI/OMIN  
7.5  
V
VESD  
0.2  
—
Ω
RDIF-R  
RDIF-F  
CI/O  
0.2  
—
Ω
0.55  
0.04  
0.65  
—
pF  
pF  
CI/OMAX-CI/OMIN  
Notes:  
5. Device mounted on FR-4 PCB pad layout (2oz copper) as shown on Diodes Incorporated’s website at http://www.diodes.com/package-outlines.html.  
6. Clamping voltage value is based on an 8µs x20µs peak pulse current (I ) waveform.  
PP  
2 of 6  
www.diodes.com  
August 2021  
© Diodes Incorporated  
DT1240A-04LP  
Document number: DS38634 Rev. 6 – 2  
123456

中文翻译

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