Datasheet > 振荡器 > TCXO> DS4026S+HCN

DS4026S+HCN

更新时间： 2024-02-28 14:18:56

品牌	Logo	应用领域
美信 - MAXIM		石英晶振温度补偿晶振
页数	文件大小	规格书
12页	177K
描述
12.8MHz to 51.84MHz TCXO

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数据手册

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DS4026S+HCN 数据手册

12.8MHz to 51.84MHz TCXO

DS4026

AC ELECTRICAL CHARACTERISTICS (continued)

= 3.±35V to 3.465V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)

PARAMETER

SYMBOL

CONDITIONS

MIN

4.7

TYP

MAX

UNITS

Standard mode

Fast mode

Setup Time ꢀor STOP Condition

µs

SU:STO

0.6

Pin Capacitance SDA, SCL

(Note 5)

±0

I/O

Capacitive Load ꢀor Each Bus

Line (Note ±0)

400

Pulse Width oꢀ Spikes That Must

Be Suppressed by the Input Filter

Fast mode

Note 1: Typical values are at +25°C, nominal supply voltages, unless otherwise indicated.

Note 2: Voltages reꢀerenced to ground.

Note 3: Limits at -40°C are guaranteed by design and not production tested.

Note 4: Speciꢀied with I C bus inactive.

Note 5: Guaranteed by design and not production tested.

Note 6: Aꢀter this period, the ꢀirst clock pulse is generated.

Note 7: A device must internally provide a hold time oꢀ at least 300ns ꢀor the SDA signal (reꢀerred to the V

oꢀ the SCL signal)

IH(MIN)

to bridge the undeꢀined region oꢀ the ꢀalling edge oꢀ SCL.

Note 8: The maximum tHD:DAT need only be met iꢀ the device does not stretch the low period (t

) oꢀ the SCL signal.

LOW

Note 9: A ꢀast-mode device can be used in a standard-mode system, but the reꢁuirement that t

≥ 250ns must then be met.

SU:DAT

This is automatically the case iꢀ the device does not stretch the low period oꢀ the SCL signal. Iꢀ such a device does not

stretch the low period oꢀ the SCL signal, it must output the next data bit to the SDA line t

±250ns beꢀore the SCL line is released.

+ t

= ±000 + 250 =

R(MAX)

SU:DAT

Note 10: C —total capacitance oꢀ one bus line in pF.

Data Transfer on I C Serial Bus

SDA

SCL

BUF

HD:STA

LOW

SU:STA

HD:STA

HIGH

SU:STO

REPEATED

START

SU:DAT

STOP

START

HD:DAT

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