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DS2404S-001+T&R PDF预览

DS2404S-001+T&R

更新时间: 2024-01-18 12:57:30
品牌 Logo 应用领域
美信 - MAXIM 时钟光电二极管外围集成电路
页数 文件大小 规格书
29页 1508K
描述
Real Time Clock, 0 Timer(s), CMOS, PDSO16, 0.300 INCH, ROHS COMPLIANT, SOIC-16

DS2404S-001+T&R 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.72
最大时钟频率:0.032 MHz信息访问方法:SERIAL, 3-WIRE
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:10.3 mm湿度敏感等级:1
端子数量:16计时器数量:
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mmuPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCK
Base Number Matches:1

DS2404S-001+T&R 数据手册

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DS2404  
Port selection is accomplished on a first-come, first-serve basis. Whichever port comes out of reset first  
will obtain control. For the 3-wire port, this is done by bringing RST high. For the 1-Wire port, this is  
done on the first falling edge of I/O after the reset and presence pulses. (See “1-Wire Signaling” section.)  
More information on how to arbitrate port access is found in section “Device Operation Modes” later in  
this document.  
PARASITE POWER  
The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry “steals” power  
whenever the I/O, RST , or VCC pins are high. When using the 1-Wire port in battery operate mode,  
RST and VCC provide no power since they are low. However, I/O will provide sufficient power as long as  
the specified timing and voltage requirements are met. The advantages of parasite power are two-fold:  
1) by parasiting off these pins, battery power is conserved and 2) the ROM may be read in absence of  
normal power. For instance, in battery-operate mode, if the battery fails, the ROM may still be read  
normally.  
In battery-backed mode, if VCC fails, the port switches in the battery but inhibits communication. The  
ROM may still be read normally over the 1-Wire port if RST is low.  
64-BIT LASERED ROM  
Each DS2404 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family  
code (DS2404 code is 04h). The next 48 bits are a unique serial number. The last eight bits are a CRC of  
the first 56 bits. (See Figure 2.)  
The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates  
as shown in Figure 3. The polynomial is X8 + X5 + X4 + 1. Additional information about the Dallas  
1-Wire Cyclic Redundancy Check is available in Application Note 27, “Understanding and Using Cyclic  
Redundancy Checks with Dallas Semiconductor iButton Products”.  
The shift register bits are initialized to zero. Then starting with the least significant bit of the family code,  
one bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number  
is entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC  
value. Shifting in the eight bits of CRC should return the shift register to all zeros.  
64-BIT LASERED ROM Figure 2  
CRC  
SERIAL NUMBER  
DS2404 FAMILY CODE  
04h  
8 BITS  
48-BIT UNQUE NUMBER  
MSB  
LSB  
1-WIRE CRC CODE Figure 3  
4 of 29  

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