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DS2172T PDF预览

DS2172T

更新时间: 2024-02-25 13:45:28
品牌 Logo 应用领域
达拉斯 - DALLAS 测试
页数 文件大小 规格书
21页 215K
描述
Bit Error Rate Tester BERT

DS2172T 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP,针数:32
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.61JESD-30 代码:S-PQFP-G32
JESD-609代码:e3长度:7 mm
湿度敏感等级:1功能数量:1
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TQFP封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.2 mm
标称供电电压:5 V表面贴装:YES
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7 mm
Base Number Matches:1

DS2172T 数据手册

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DS2172  
Bit Error Rate Tester (BERT)  
www.dalsemi.com  
FEATURES  
PIN ASSIGNMENT  
Generates/Detects digital bit patterns for  
analyzing, evaluating and troubleshooting  
digital communications systems  
Operates at speeds from DC to 52 MHz  
Programmable polynomial length and  
feedback taps for generation of any other  
pseudorandom pattern up to 32 bits in length  
including: 26-1, 29-1, 211-1, 215-1, 220-1, 223-1,  
and 232-1  
32 31 30 29 28 27 26 25  
TL  
AD0  
AD1  
TEST  
VSS  
AD2  
AD3  
AD4  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
RL  
RLOS  
LC  
VSS  
VDD  
INT  
WR(R/W)  
ALE(AS)  
DS2172  
32-Pin TQFP 20  
19  
18  
17  
Programmable user-defined pattern and  
length for generation of any repetitive pattern  
up to 32 bits in length  
9 10 11 12 13 14 15 16  
Large 32-bit error count and bit count  
registers  
Software programmable bit error insertion  
Fully independent transmit and receive  
sections  
ORDERING INFORMATION  
8-bit parallel control port  
DS2172T  
(00 C to 700 C)  
Detects test patterns with bit error rates up to  
DS2172TN  
(-400 C to + 850 C)  
10-2  
DESCRIPTION  
The DS2172 Bit Error Rate Tester (BERT) is a software programmable test pattern generator, receiver,  
and analyzer capable of meeting the most stringent error performance requirements of digital  
transmission facilities. Two categories of test pattern generation (Pseudo-random and Repetitive)  
conform to CCITT/ITU O.151, O.152, O.153, and O.161 standards. The DS2172 operates at clock rates  
ranging from DC to 52 MHz. This wide range of operating frequency allows the DS2172 to be used in  
existing and future test equipment, transmission facilities, switching equipment, multiplexers, DACs,  
Routers, Bridges, CSUs, DSUs, and CPE equipment.  
The DS2172 user-programmable pattern registers provide the unique ability to generate loopback patterns  
required for T1, Fractional-T1, Smart Jack, and other test procedures. Hence the DS2172 can initiate the  
loopback, run the test, check for errors, and finally deactivate the loopback.  
The DS2172 consists of four functional blocks: the pattern generator, pattern detector, error counter, and  
control interface. The DS2172 can be programmed to generate any pseudorandom pattern with length up  
to 232-1 bits (see Table 5, Note 9) or any user programmable bit pattern from 1 to 32 bits in length. Logic  
inputs can be used to configure the DS2172 for applications requiring gap clocking such as Fractional-T1,  
Switched-56, DDS, normal framing requirements, and per-channel test procedures. In addition, the  
DS2172 can insert single or 10-1 to 10-7 bit errors to verify equipment operation and connectivity.  
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051700  

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