Datasheet > DS1830+

DS1830+

更新时间： 2024-02-04 05:57:47

品牌	Logo	应用领域
美信 - MAXIM		光电二极管
页数	文件大小	规格书
7页	287K
描述
Power Supply Support Circuit, Fixed, 1 Channel, PDIP8, 0.300 INCH, DIP-8

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技术参数
数据手册

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DS1830+ 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	DIP,	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
Factory Lead Time：	1 week	风险等级：	2.23
可调阈值：	NO	模拟集成电路 - 其他类型：	POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码：	R-PDIP-T8	长度：	9.375 mm
湿度敏感等级：	1	信道数量：	1
功能数量：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	座面最大高度：	4.572 mm
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	1 V
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
温度等级：	INDUSTRIAL	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7.62 mm
Base Number Matches：	1

DS1830+ 数据手册

D1830/A

OPERATION — PUSHBUTTON RESET

The DS1830 provides a pushbutton switch for manual reset control. When any of the DS1830/A resets

are not active (low) a reset cycle can be initiated by a pushbutton reset. The pushbutton reset is generated

by pulling the PBRST pin low for at least 1ms. When the push- button is held low all resets are forced

active. The reset will remain active until the pushbutton input is released and then will start a sequenced

time-out based on the condition of the TD input. The Pushbutton input is pulled high through an internal

40kꢀ pull-up resistor and debounced via internal circuitry. See Figure 2 for an application example and

Figure 3 for the timing diagram.

PUSHBUTTON RESET Figure 2

TIMING DIAGRAM — PUSHBUTTON RESET Figure 3

OPERATION — TIME DELAY SELECT

The DS1830 provides an input to select three time delay characteristics for the reset outputs. The TD

input has 3 states high (V_CC), low (ground) and no connect (N.C.). Table 2 details the minimum timing

based on the state of the TD input. If the TD input is connected to ground; RST1 will have a minimum

time delay of 10 ms after V_CCis in tolerance. If the TD input is floated; RST1 will have a minimum time

delay of 20 ms after V_CCis in tolerance. If the TD input is connected to V_CC, RST1 will have a minimum

time delay of 50 ms after V_CCis in tolerance. An oscillator and clock chain generate the reset timing with

each time delay based on the same device oscillator. The time delay for RST2 will be 5 times as long as

RST1 and RST3 will be 10 times the duration of RST1 .

TD CONTROL MINIMUM RESET TIMING Table 2

RST1

RST2

RST3

TD = GND

TD = N.C.

TD = V_CC

10ms

20ms

50ms

100ms

250ms

100ms

200ms

500ms

3 of 7

1 234 5 6 7

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