Datasheet > DS1086HU-C01/T+W

DS1086HU-C01/T+W

更新时间： 2024-01-03 12:14:23

品牌	Logo	应用领域
美信 - MAXIM		时钟光电二极管外围集成电路
页数	文件大小	规格书
14页	198K
描述
Clock Generator, 133MHz, CMOS, PDSO8, 0.118 INCH, ROHS COMPLIANT, MICRO, SOP-8

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技术参数
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DS1086HU-C01/T+W 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	TSSOP,	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.74
JESD-30 代码：	S-PDSO-G8	JESD-609代码：	e3
长度：	3 mm	湿度敏感等级：	1
端子数量：	8	最高工作温度：	85 °C
最低工作温度：	-40 °C	最大输出时钟频率：	133 MHz
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	SQUARE	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
座面最大高度：	1.1 mm	最大供电电压：	5.25 V
最小供电电压：	4.75 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	MATTE TIN
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3 mm	uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, OTHER
Base Number Matches：	1

DS1086HU-C01/T+W 数据手册

Spread-Spectrum EconOscillator

DS1086

AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE (continued)

= 5V 5%, T = 0°C to +70°C.)

PARAMETER

SYMBOL

CONDITION

MIN

0.6

TYP

MAX

UNITS

Fast mode

Setup Time for STOP

µs

SU:STO

Standard mode

4.0

Capacitive Load for Each Bus

Line

(Note 16)

400

NV Write-Cycle Time

Input Capacitance

Note 1:

Note 2:

All voltages are referenced to ground.

DAC and OFFSET register settings must be configured to maintain the master oscillator frequency within this range.

Correct operation of the device is not guaranteed if these limits are exceeded.

Note 3:

Note 4:

This is the absolute accuracy of the master oscillator frequency at the default settings.

This is the change that is observed in master oscillator frequency with changes in voltage from nominal voltage at

= +25°C.

Note 5:

This is the percentage frequency change from the +25°C frequency due to temperature at V

= 5V. The maximum tem-

perature change varies with the master oscillator frequency setting. The minimum occurs at the default master oscillator

frequency (f ). The maximum occurs at the extremes of the master oscillator frequency range (66MHz or 133MHz)

default

(see Figure 2).

Note 6:

Note 7:

The dither deviation of the master oscillator frequency is unidirectional and lower than the undithered frequency.

The integral nonlinearity of the frequency adjust DAC is a measure of the deviation from a straight line drawn between the

two endpoints of a range. The error is in percentage of the span.

Note 8:

Note 9:

This is true when the prescaler = 1.

Frequency settles faster for small changes in value. During a change, the frequency transitions smoothly from the original

value to the new value.

Note 10: This indicates the time elapsed between power-up and the output becoming active. An on-chip delay is intentionally

introduced to allow the oscillator to stabilize. t is equivalent to approximately 512 master clock cycles and therefore

stab

depends on the programmed clock frequency.

Note 11: Output voltage swings can be impaired at high frequencies combined with high output loading.

Note 12: A fast-mode device can be used in a standard-mode system, but the requirement t > 250ns must then be met.

SU:DAT

This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does

stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line at least t

1000ns + 250ns = 1250ns before the SCL line is released.

+ t

R MAX

SU:DAT

Note 13: After this period, the first clock pulse is generated.

Note 14: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the V

of the SCL sig-

IH MIN

nal) in order to bridge the undefined region of the falling edge of SCL.

Note 15: The maximum t

need only be met if the device does not stretch the LOW period (t

) of the SCL signal.

HD:DAT

LOW

Note 16: C —total capacitance of one bus line, timing referenced to 0.9 x V

and 0.1 x V

Note 17: Typical frequency shift due to aging is 0.5%. Aging stressing includes Level 1 moisture reflow preconditioning (24hr

+125°C bake, 168hr 85°C/85%RH moisture soak, and 3 solder reflow passes +240 +0/-5°C peak) followed by 1000hr

max V

biased 125°C HTOL, 1000 temperature cycles at -55°C to +125°C, 96hr 130°C/85%RH/5.5V HAST and 168hr

121°C/2 ATM Steam/Unbiased Autoclave.

_____________________________________________________________________

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与DS1086HU-C01/T+W相关器件

型号	品牌	描述	获取价格	数据表
DS1086HU-C01+	MAXIM	Clock Generator, 133MHz, CMOS, PDSO8, 0.118 INCH, ROHS COMPLIANT, MICRO, SOP-8	获取价格
DS1086HU-C01+T	MAXIM	Clock Generator, 133MHz, CMOS, PDSO8, 0.118 INCH, ROHS COMPLIANT, MICRO, SOP-8	获取价格
DS1086HU-C02+	MAXIM	Clock Generator, CMOS,	获取价格
DS1086L	MAXIM	3.3V Spread-Spectrum EconOscillator	获取价格
DS1086L	ADI	3.3V扩频EconOscillator	获取价格
DS1086L_07	MAXIM	3.3V Spread-Spectrum EconOscillator	获取价格

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