Datasheet > DG201ADY/GG8-T

DG201ADY/GG8-T

更新时间： 2024-01-11 09:56:11

品牌	Logo	应用领域
美信 - MAXIM		/
页数	文件大小	规格书
12页	512K
描述
SPST,

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技术参数
数据手册

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DG201ADY/GG8-T 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.55	模拟集成电路 - 其他类型：	SPST
Base Number Matches：	1

DG201ADY/GG8-T 数据手册

Quad SPST CMOS Analog Switches

LOGIC

INPUT

LOGIC "0" - SW ON

V = V

R + R

DS(ON)

+15V

t < 20ns

50%

SWITCH

INPUT

SWITCH

OUTPUT

= +2V

SWITCH

INPUT

35pF

1kΩ

0.9

LOGIC

INPUT

SWITCH

OUTPUT

0.1

Ω

(REPEAT TEST FOR IN , IN , AND IN )

off1

GND

V-

-15V

off2

Figure 1. Switching Time

Tyꢃꢄcal R

vs4 Pꢀwer Suꢃꢃlꢄes fꢀr Maxꢄm’s DG20ꢁA, and DG2ꢁꢁ

DS(VN)

AT ANALVG SIGNAL LE5EL

DS(VN)

PVWER SUPPLIES

-.5

3ꢀ0

—

+.5

3ꢁ0

—

-ꢁ05

+ꢁ05

—

-ꢁ.5

—

+ꢁ.5

—

±ꢀ5

±105

±1ꢀ5

—

16ꢀ

12ꢀ

2ꢀ0

160

—

13ꢀ

1ꢀꢀ

To provide protection for overvoltages up to 205 above

the supplies, a 1N±001 or 1N91± type diode should be

placed in series with the positive and negative supplies

as shown in Figure 2. The addition of these diodes will

reduce the analog signal range to 15 below the posi-

tive supply and 15 above the negative supply.

Protecting Against Fault

Conditions

Fault conditions occur when power supplies are turned

off when input signals are still present, or when over-

voltages occur at the inputs during normal operation. In

either case, source-to-body diodes can be forward

biased and conduct current from the signal source. If

this current is required to be kept to low (µA) levels

then the addition of eꢂternal protection diodes is rec-

ommended.

IN4001

-15V

+15V

DG201A

DG211

Pin Configurations (continued)

TOP VIEW

IN1

IN2

V-

12 S2

11 V+

Figure 2. Protection against Fault Conditions

DG201A

DG211

GND

N.C.

IN4

IN3

QFN*

_______________________________________________________________________________________

1...3 4 567 8 9...12

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