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DDU18-100 PDF预览

DDU18-100

更新时间: 2024-02-02 18:44:08
品牌 Logo 应用领域
其他 - ETC 延迟线逻辑集成电路
页数 文件大小 规格书
4页 64K
描述
Tapped Delay Line

DDU18-100 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP24,.4针数:24
Reach Compliance Code:compliant风险等级:5.14
Is Samacsys:NJESD-30 代码:R-XDIP-T15
逻辑集成电路类型:ACTIVE DELAY LINE功能数量:1
抽头/阶步数:8端子数量:15
最高工作温度:85 °C最低工作温度:
输出特性:OPEN-EMITTER输出极性:TRUE
封装主体材料:UNSPECIFIED封装代码:DIP
封装等效代码:DIP24,.4封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:-5 V可编程延迟线:NO
Prop。Delay @ Nom-Sup:100 ns认证状态:Not Qualified
座面最大高度:8.001 mm子类别:Delay Lines
表面贴装:NO技术:ECL
温度等级:OTHER端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED总延迟标称(td):100 ns
宽度:10.16 mmBase Number Matches:1

DDU18-100 数据手册

 浏览型号DDU18-100的Datasheet PDF文件第2页浏览型号DDU18-100的Datasheet PDF文件第3页浏览型号DDU18-100的Datasheet PDF文件第4页 
DDU18  
Ò
8-TAP, ECL-INTERFACED  
FIXED DELAY LINE  
(SERIES DDU18)  
data  
delay  
3
devices, inc.  
FEATURES  
PACKAGES  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
IN  
GND  
N/C  
T1  
T2  
T3  
GND  
GND  
T4  
T5  
T6  
IN  
GND  
24  
1
·
·
·
Eight equally spaced outputs  
Fits in 400 mil 24-pin DIP socket  
Input & outputs fully 100K-ECL interfaced & buffered  
N/C  
N/C  
N/C  
N/C  
GND  
VEE  
N/C  
N/C  
N/C  
N/C  
T10  
T1  
T2  
3
4
T3  
5
GND  
VEE  
GND  
GND  
T4  
6
19  
18  
9
7
10  
11  
12  
8
T7  
T8  
T5  
9
T6  
10  
11  
12  
DDU18-xx  
DDU18-xxM Military DIP  
DIP  
T7  
DDU18-xxC3  
DDU18-xxMC3 Mil SMD  
SMD  
GND  
T8  
13  
FUNCTIONAL DESCRIPTION  
PIN DESCRIPTIONS  
The DDU18-series device is a 8-tap digitally buffered delay line. The  
IN  
T1-T8 Tap Outputs  
VEE -5 Volts  
GND Ground  
Signal Input  
signal input (IN) is reproduced at the outputs (T1-T8), shifted in time by an  
amount determined by the device dash number (See Table). For dash  
numbers less than 16, the total delay of the line is measured from T1 to  
T8. The nominal tap-to-tap delay increment is given by one-seventh of  
the total delay, and the inherent delay from IN to T1 is nominally 2.0ns. For dash numbers greater than or  
equal to 16, the total delay of the line is measured from IN to T8. The nominal tap-to-tap delay increment  
is given by one-eighth of this number.  
SERIES SPECIFICATIONS  
DASH NUMBER SPECIFICATIONS  
Part  
Number  
DDU18-4  
DDU18-8  
Total  
Delay (ns)  
3.5 ± 1.0 *  
7.0 ± 1.0 *  
10.5 ± 1.0 *  
16 ± 1.0  
20 ± 1.0  
24 ± 1.2  
32 ± 1.6  
40 ± 2.0  
Delay Per  
Tap (ns)  
0.5 ± 0.3  
1.0 ± 0.4  
1.5 ± 0.4  
2.0 ± 0.5  
2.5 ± 1.0  
3.0 ± 1.5  
4.0 ± 2.0  
5.0 ± 2.0  
6.0 ± 2.0  
7.0 ± 2.0  
8.0 ± 2.0  
9.0 ± 2.0  
10.0 ± 2.5  
12.5 ± 2.5  
15.0 ± 3.0  
20.0 ± 4.0  
25.0 ± 5.0  
·
·
·
·
·
·
Minimum input pulse width: 40% of total delay  
Output rise time: 2ns typical  
Supply voltage: -5VDC ± 5%  
Power dissipation: 500mw typical (no load)  
Operating temperature: 0° to 85° C  
Temp. coefficient of total delay: 100 PPM/°C  
DDU18-12  
DDU18-16  
DDU18-20  
DDU18-24  
DDU18-32  
DDU18-40  
DDU18-48  
DDU18-56  
DDU18-64  
DDU18-72  
DDU18-80  
DDU18-100  
DDU18-120  
DDU18-160  
DDU18-200  
2.0ns  
1/7  
1/7  
1/7  
1/7  
1/7  
1/7  
1/7  
48 ± 2.4  
56 ± 2.8  
64 ± 3.2  
72 ± 3.6  
VCC IN  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
T8 GND  
80 ± 4.0  
100 ± 5.0  
120 ± 6.0  
160 ± 8.0  
200 ± 10.0  
Functional diagram for dash numbers < 16  
1/8  
1/8  
1/8  
1/8  
1/8  
1/8  
1/8  
1/8  
* Total delay is referenced to first tap output  
Input to first tap = 2.0ns ± 1ns  
VCC IN  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
T8 GND  
NOTE: Any dash number between 4 and 200  
not shown is also available.  
Functional diagram for dash numbers >= 16  
Ó1997 Data Delay Devices  
Doc #97041  
DATA DELAY DEVICES, INC.  
3 Mt. Prospect Ave. Clifton, NJ 07013  
1
12/12/97  
Powered by ICminer.com Electronic-Library Service CopyRight 2003  

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