Datasheet > DAC1253X

DAC1253X

更新时间： 2022-01-20 21:55:00

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
12页	153K
描述
DAC1253X 2.5V 12BIT 2MSPS DAC DAC1253X\|Data Sheet

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DAC1253X 数据手册

DAC1253X

2.5V 12BIT 2MSPS DAC

PHANTOM CELL INFORMATION

VDD18A1

VSS18A1

VBBA

VDD18A1

VSS18A1

VBBA

dac1253x

VOUT

(dac1253a)

VDD18A2

VSS18A2

Pin Name

D[11:0]

Property

Pin Usage

Pin Layout Guide

Internal / External

1. Digital Input Signal lines must have same length to

reduce propagation delay.

AMPSEL

PWDN

1. Voltage reference lines (VRT and VRB) must be wide metal

to reduce voltage drop of metal lines.

VRT

VRB

External

2. VOUT signal should not be crossed by any signals and

should not run next to digital signals to minimize capacitive

coupling between the two signals.

VOUT

Internal / External

VDD25A1

VSS25A1

VDD25A2

VSS25A2

VBBA

External

1. It is recommended that you use thick analog power metal.

When connected to PAD, the path should be kept as short

as possible.

2. Digital power and analog power are separately used.

1. It is recommended that you use thick analog power metal. when connecting to PAD, the path should

be kept as short as possible.

2. Digital power and analog power are separately used.

3. When the core block is connected to other blocks, it must be double guard-ring using N-well and P+

active to remove the substrate and coupling noise.

In that case, the power metal should be connected to PAD directly.

4. The Bulk power is used to reduce the influence of substrate noise.

5. Digital input signal lines must be same length to reduce the difference of delay.

SEC ASIC

7 / 11

ANALOG

1...4 5 678 9 10...12

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