Datasheet > D27C256

D27C256

更新时间： 2024-02-03 12:44:52

品牌	Logo	应用领域
超微 - AMD		可编程只读存储器电动程控只读存储器
页数	文件大小	规格书
12页	94K
描述
256 Kilobit (32,768 x 8-Bit) CMOS EPROM

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中文翻译

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数据手册

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D27C256 数据手册

FINAL

Advanced

Micro

Am27C256

256 Kilobit (32,768 x 8-Bit) CMOS EPROM

Devices

DISTINCTIVE CHARACTERISTICS

■ Fast access time

■ Latch-up protected to 100 mA from –1 V to

V_CC+ 1 V

— 55 ns

■ High noise immunity

■ Low power consumption

■ Versatile features for simple interfacing

— 20 µA typical CMOS standby current

■ JEDEC-approved pinout

— Both CMOS and TTL input/output

compatibility

■ Single +5 V power supply

— Two line control functions

■ ±10% power supply tolerance available

■ 100% Flashrite programming

— Typical programming time of 4 seconds

■ Standard 28-pin DIP, PDIP, 32-pin TSOP and

PLCC packages

GENERAL DESCRIPTION

The Am27C256 is a 256K-bit ultraviolet erasable pro-

grammable read-only memory. It is organized as 32K

words by 8 bits per word, operates from a single +5 V

supply, has a static standby mode, and features fast sin-

gle address location programming. Products are avail-

ableinwindowedceramicDIPpackagesaswellasplas-

tic one time programmable (OTP) PDIP, TSOP, and

PLCC packages.

controls, thus eliminating bus contention in a multiple

bus microprocessor system.

AMD’s CMOS process technology provides high speed,

low power, and high noise immunity. Typical power con-

sumption is only 80 mW in active mode, and 100 µW in

standby mode.

All signals are TTL levels, including programming sig-

nals. Bit locations may be programmed singly, in blocks,

or at random. The Am27C256 supports AMD’s Flashrite

programming algorithm (100 µs pulses) resulting in typi-

cal programming time of 4 seconds.

Typically, any byte can be accessed in less than 55 ns,

allowing operation with high-performance microproces-

sors without any WAIT states. The Am27C256 offers

separate Output Enable (OE) and Chip Enable (CE)

BLOCK DIAGRAM

Data Outputs

DQ0–DQ7

Output Enable

Chip Enable

and

Output

Buffers

Prog Logic

Decoder

Gating

A0–A14

Address

Inputs

262,144

Bit Cell

Matrix

Decoder

08007H-1

Publication# 08007 Rev. H Amendment/0

Issue Date: May 1995

2-32

12 3 4 5 6 7...12

中文翻译

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