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CYII4SM014KAA-GEC PDF预览

CYII4SM014KAA-GEC

更新时间: 2024-02-11 01:48:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 传感器换能器图像传感器时钟
页数 文件大小 规格书
27页 1318K
描述
14Megapixel CMOS Image Sensor

CYII4SM014KAA-GEC 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.76其他特性:ELECTRONIC ROLLING SHUTTER
阵列类型:FULL FRAME主体宽度:32.4 mm
主体高度:2.55 mm主体长度或直径:45.5 mm
动态范围:65 dB帧速率:3 fps
水平像素:3048外壳:PLASTIC
主时钟:15 MHz安装特点:THROUGH HOLE MOUNT
最高工作温度:50 °C最低工作温度:
输出范围:0.50-3V输出类型:ANALOG VOLTAGE
封装形状/形式:RECTANGULAR像素大小:8X8 µm
传感器/换能器类型:IMAGE SENSOR,CMOS最大供电电压:3.6 V
最小供电电压:3.3 V表面贴装:NO
端接类型:SOLDER垂直像素:4560
Base Number Matches:1

CYII4SM014KAA-GEC 数据手册

 浏览型号CYII4SM014KAA-GEC的Datasheet PDF文件第1页浏览型号CYII4SM014KAA-GEC的Datasheet PDF文件第3页浏览型号CYII4SM014KAA-GEC的Datasheet PDF文件第4页浏览型号CYII4SM014KAA-GEC的Datasheet PDF文件第5页浏览型号CYII4SM014KAA-GEC的Datasheet PDF文件第6页浏览型号CYII4SM014KAA-GEC的Datasheet PDF文件第7页 
CYII4SC014KAA-GTC  
CYII4SM014KAA-GEC  
Architecture and Operation  
Floor Plan  
The basic architecture of the sensor is shown in Figure 1.  
Figure 1. Block Diagram of the IBIS4-14000 Image Sensor  
pixel array  
4560 x 3048 active pixels  
Pixel (0,0)  
CLK_YL  
SYNC_YL  
CLK_YR  
SYNC_YR  
SHS  
SHR  
3048 column amplifiers  
x-shift register  
4 parallel  
analog  
outputs  
CLK_X  
SYNC_X  
The Y shift registers point at a row of the imager array. This  
row is selected and/or reset by the row drivers. There are 2 Y  
shift registers: one points at the row that is read out and the  
second one points at the row to be reset. The second pointer  
may lead the first pointer by a specific number of rows. In that  
case, the time difference between both pointers is the  
integration time. Alternatively, both shift registers can point at  
the same row for reset and readout for a faster reset  
sequence. When the row is read out, it is also reset in order to  
do double sampling for fixed pattern noise reduction.  
The pixel array of the IBIS4-14000 consists of 4536 x 3024  
active pixels and 24 additional columns and rows, which can  
also be addressed (see Figure 2 on page 3). The column  
amplifiers read out the pixel information and perform the  
double sampling operation. They also multiplex the signals on  
the readout buses, which are buffered by the output amplifiers.  
The shift registers can be configured for various subsampling  
modes. The output amplifiers can be individually powered  
down. And some other extra functions are foreseen. These  
options are configurable via a serial input port.  
Document #: 38-05709 Rev. *B  
Page 2 of 27  
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