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CY8CTMA120-56LFXI PDF预览

CY8CTMA120-56LFXI

更新时间: 2024-02-01 04:53:02
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 控制器
页数 文件大小 规格书
35页 983K
描述
TrueTouch™ Multi-Touch All-Point Touchscreen Controller

CY8CTMA120-56LFXI 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:8 X 8 MM, LEAD FREE, MO-220, QFN-56
针数:56Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.78
边界扫描:NO总线兼容性:I2C; USB
最大时钟频率:24.06 MHzJESD-30 代码:S-XQCC-N56
JESD-609代码:e3长度:8 mm
湿度敏感等级:3I/O 线路数量:49
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
认证状态:Not QualifiedRAM(字数):1000
座面最大高度:1 mm最大供电电压:5.25 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:8 mmBase Number Matches:1

CY8CTMA120-56LFXI 数据手册

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CY8CTMA120  
Figure 4. User Module/Source Code Development Flows  
Device Editor  
Designing with User Modules  
The development process for the PSoC device differs from that  
of a traditional fixed function microprocessor. The configurable  
analog and digital hardware blocks give the PSoC architecture a  
unique flexibility. It pays dividends in managing specification  
change during development and by lowering inventory costs.  
These configurable resources, called PSoC blocks, have the  
ability to implement a wide variety of user-selectable functions.  
Each block has several registers that determine its function and  
connectivity to other blocks, multiplexers, buses and to the IO  
pins. Iterative development cycles permit you to adapt the  
hardware and the software. This substantially lowers the risk of  
having to select a different part to meet the final design require-  
ments.  
Placement  
User  
Module  
Selection  
Source  
Code  
Generator  
and  
Parameter  
-ization  
Generate  
Application  
Application Editor  
To speed the development process, the PSoC Designer IDE  
provides a library of pre-built, pre-tested hardware peripheral  
functions, called “User Modules.” User modules make selecting  
and implementing peripheral devices simple, and come in  
analog, digital, and mixed signal varieties. The standard user  
module library contains over 50 common peripherals such as  
ADCs, DACs timers, counters, UARTs, and other not so common  
peripherals such as DTMF generators and Bi-Quad analog filter  
sections.  
Source  
Code  
Editor  
Project  
Manager  
Build  
Manager  
Build  
All  
Debugger  
Each user module establishes the basic register settings that  
implement the selected function. It also provides parameters that  
allows to tailor its precise configuration to a particular application.  
For example, a Pulse Width Modulator User Module configures  
one or more digital PSoC blocks, one for each 8 bits of resolution.  
The user module parameters permit to establish the pulse width  
and duty cycle. User modules also provide tested software to cut  
development time. The user module application programming  
interface (API) provides high level functions to control and  
respond to hardware events at run time. The API also provides  
optional interrupt service routines that are adapted as needed.  
Event &  
Breakpoint  
Manager  
Interface  
to ICE  
Storage  
Inspector  
The next step is to write the main program and any sub-routines  
using PSoC Designer’s Application Editor subsystem. The Appli-  
cation Editor includes a Project Manager that allows to open the  
project source code files (including all generated code files) from  
a hierarchal view. The source code editor provides syntax  
coloring and advanced edit features for both C and assembly  
language. File search capabilities include simple string searches  
and recursive “grep-style” patterns. A single mouse click invokes  
the Build Manager. It employs a professional-strength “makefile”  
system to automatically analyze all file dependencies and run the  
compiler and assembler as necessary. Project level options  
control optimization strategies used by the compiler and linker.  
Syntax errors are displayed in a console window. Double click  
the error message to view the offending line of source code.  
When all is correct, the linker builds a HEX file image suitable for  
programming.  
The API functions are documented in user module data sheets  
that are viewed directly in the PSoC Designer IDE. These data  
sheets explain the internal operation of the user module and  
provide performance specifications. Each data sheet describes  
the use of each user module parameter and documents the  
setting of each register controlled by the user module.  
The development process starts when you open a new project  
and bring up the Device Editor, a graphical user interface (GUI)  
for configuring the hardware. Pick the user modules you need for  
your project and map them onto the PSoC blocks with  
point-and-click simplicity. Next, build signal chains by intercon-  
necting user modules to each other and the IO pins. At this stage,  
also configure the clock source connections and enter parameter  
values directly or by selecting values from drop down menus.  
When you are ready to test the hardware configuration or move  
on to developing code for the project, perform the “Generate  
Application” step. This causes PSoC Designer to generate  
source code that automatically configures the device to your  
specification and provides the high level user module API  
functions.  
The last step in the development process takes place inside the  
PSoC Designer’s Debugger subsystem. The Debugger  
downloads the HEX image to the ICE where it runs at full speed.  
Debugger capabilities rival those of systems costing many times  
more. In addition to traditional single-step, run-to-breakpoint,  
and watch-variable features, the Debugger provides a large  
trace buffer and allows you define complex breakpoint events  
such as monitoring address and data bus values, memory  
locations, and external signals.  
Document Number: 001-46901 Rev. *C  
Page 6 of 35  
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