CMM1530-LC
Advanced Product Information
1.85 to 1.91 GHz
3.0V, 30 dBm, PCS/PCN
LCC-8 Power Amplifier
November 2002
(1 of 4)
Features
❏ Operation as Low as 3.0V
❏ 38% Linear Power Added Efficiency
❏ +30 dBm Output Power (IS-136 TDMA Mode)
❏ +28.5 dBm Output Power (IS-98 CDMA Mode)
❏ 32 dB Gain at Operating Output
❏ Tested Under Digital Modulation
❏ New Low-Cost, Thermally Enhanced,
LCC-8 Package
Functional Block Diagram
Ground Tab
8 V
V
V
1
2
g3
g2
7 RF OUT/V
6 RF OUT/V
g1
d3
❏ PHEMT Material Technology
RF IN 3
d3
Applications
❏ PCS Handsets
❏ PCS Base Stations
❏ Wireless Local Loop Subscriber Units
❏ CDMAone Handsets
5 V
V
4
d2
d1
Ground Tab
The CMM1530-LC is packaged in a low-cost, space
efficient, LCC-8 package that provides excellent electrical sta-
bility and low thermal resistance. The part requires minimal
external circuitry for bias and matching to reduce space and
cost.
This device is unconditionally stable under all source
and load impedances.
Description
The CMM1530-LC is a linear power amplifier
intended for use in PCS handsets and wireless local loop sub-
scriber units. The amplifier can be biased to meet the require-
ments of PCS-1900, IS-136 (TDMA), IS-98 (CDMA) or DCS-
1800 systems. It is a member of Celeritek’s new Triniti DX
Pro™ family of 3V power amplifier MMICs.
Absolute Maximum Ratings
Parameter
Rating
Parameter
Rating
Parameter
Rating
Drain Voltage (+V )
d
+5.5 V*
Power Dissipation
5 W
Operating Temperature
-40°C to +90°C
Drain Current (I )
1.8 A
3 dBm*
-3.0 V*
Thermal Resistance
Storage Temperature
20°C/W
-65°C to +150°C
Channel Temperature
Soldering Temperature
150°C
260°C for 5 Sec.
d
RF Input Power
DC Gate Voltage (-V )
g
* Max (+V ) and (-V ) under linear operation. Max potential difference across the device at 1dB gain compression point (2V + |-V |) not to exceed the minimum breakdown voltage (V ) of +12V.
d
g
d
g
br
Recommended Operating Conditions
Parameter
Typ
Units
Parameter
Typ
Units
Drain Voltage (+V )
d
3.0 to 4.2
Volts
Operating Temperature (PC Board)
-30 to +80
°C
third stage FET gate bias is applied to Vg3 (Pin 8). It is desir-
able to use one or more DACs (digital to analog converters)
along with appropriate divider networks, in order to adjust the
quiescent currents to within 10 mA of the target values. As an
example, for CDMA applications the target quiescent current
of the third FET is 85 mA, while those for the second and the
first FETs are 45 and 15 mA, respectively. The total quiescent
is 135 mA. It is also recommended that the quiescent currents
be set in the following sequence: the third stage FET is set
first, followed by the second stage FET, followed by the first
stage FET. The negative supply voltages control the quiescent
currents through each of the FETs and, therefore, control the
output power, adjacent channel power ratios, and the currents
at the full output power.
Application Information
The CMM1530-LC is a three stage amplifier that requires
a positive and a negative supply voltages for proper operation.
It is essential when turning on the device that the negative sup-
ply be applied before the positive supply. When turning the
device off, the positive supply should be removed before the
negative supply is removed.
The CMM1530-LC can be operated over a range of sup-
ply voltages and bias points. It is important that the maximum
power dissipation of the package be observed at all times and
that the maximum voltage across the device is not exceeded.
Circuit Design Considerations
Biasing Negative gate voltages are necessary to set the bias
currents of the three FET stages in the CMM1530-LC. The
first stage gate bias voltage is applied to Vg1 (Pin 2). The sec-
ond stage gate bias voltage is applied to Vg2 (Pin 1), while the
The positive supply voltages are applied to Pins 4, 5, 6
and 7.
– Continued on Page 2 –
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Santa Clara, California 95054
Phone: (408) 986-5060
Fax: (408) 986-5095
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