■
■
■
Capacitance across R
equal to the characteristic impedance, Z , of the trans-
f
o
mission line or cable. Use R to isolate the amplifier
■
Do not place a capacitor across R
3
f
from reactive loading caused by the transmission line,
or by parasitics.
■
Use a resistor with low parasitic
capacitance for R
f
A capacitive load
In inverting gain applications, R is connected directly to
3
■
Use a series resistor between the output
ground. The resistors R , R , and R are equal to Z .
4
6
7
o
and a capacitive load (see the Settling
The parallel combination of R and R is also equal to Z .
5
g
o
Time vs. C plot)
L
The input and output matching resistors attenuate the
signal by a factor of 2, therefore additional gain is needed.
Long traces and/or lead lengths between R
and the CLC408
f
Use C to match the output transmission line over a greater
6
■
Keep these traces as short as possible
frequency range. It compensates for the increase of
the op amps output impedance with frequency.
For non-inverting and transimpedance gain configurations:
■
Extra capacitance between the inverting
Thermal Design
To calculate the power dissipation for the CLC408,
follow these steps:
pin and ground (C )
g
■
See the Printed Circuit Board Layout
sub-section below for suggestions on
reducing C
1) Calculate the no-load op amp power:
g
P
= I • (V – V
)
■
Increase R if peaking is still observed
amp
CC
CC
EE
f
after reducing C
g
2) Calculate the output stage’s RMS power:
P = (V – V ) • I , where V and I
load
For inverting gain configurations:
o
CC
load
load
load
are the RMS voltage and current across the
external load
■
Inadequate ground plane at the non-inverting
pin and/or long traces between non-inverting
pin and ground
3) Calculate the total op amp RMS power:
P = P + P
t
amp
o
■
Place a 50 to 200Ω resistor between the
non-inverting pin and ground (see R in
t
Figure 2)
To calculate the maximum allowable ambient tempera-
ture, solve the following equation: T = 175 – P
•
amb
t
Capacitive Loads
Capacitive loads, such as found in A/D converters,
require a series resistor (R ) in the output to improve
settling performance. The Settling Time vs. Capacitive
Load plot in the Typical Performance Characteristics
section provides the information for selecting this resistor.
, where
is the thermal resistance from junction
θ
θ
JA
JA
to ambient in °C/W, and T
is in °C. The Package
amb
s
Thermal Resistance section contains the thermal
resistance for various packages.
Dynamic Range (input /output protection)
ESD diodes are present on all connected pins for pro-
tection from static voltage damage. For a signal that
may exceed the supply voltages, we recommend using
diode clamps at the amplifier’s input to limit the signals
to less than the supply voltages.
Using a resistor in series with a reactive load will also
reduce the load’s effect on amplifier loop dynamics.
For instance, driving coaxial cables without an output
series resistor may cause peaking or oscillation.
Transmission Line Matching
The CLC408’s output current can exceed the maximum
safe output current. To limit the output current to <
96mA:
One method for matching the characteristic impedance
of a transmission line is to place the appropriate
resistor at the input or output of the amplifier. Figure 6
shows the typical circuit configurations for matching
transmission lines.
■
Limit the output voltage swing with diode
clamps at the input
V
o(max)
C6
R
≥
■
Make sure that
Z0
L
R1
R3
R2
Rg
R5
I
+
Z0
o(max)
Vo
R7
CLC408
+
-
V1
V2
R6
V
is the output voltage swing limit, and I
is
-
o(max)
o(max)
Z0
the maximum safe output current.
Rf
R4
+
-
Dynamic Range (input /output levels)
The Electrical Characteristics section specifies the
Common-Mode Input Range and Output Voltage
Range; these voltage ranges scale with the supplies.
Output Current is also specified in the Electrical
Characteristics section.
Figure 6: Transmission Line Matching
In non-inverting gain applications, R is connected
g
directly to ground. The resistors R , R , R6, and R are
1
2
7
7
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