5秒后页面跳转
CDB35L00 PDF预览

CDB35L00

更新时间: 2024-02-11 14:00:41
品牌 Logo 应用领域
凌云 - CIRRUS 放大器
页数 文件大小 规格书
12页 376K
描述
2.7 W x 4 CS35L00 Amplifier Demonstration Board

CDB35L00 数据手册

 浏览型号CDB35L00的Datasheet PDF文件第4页浏览型号CDB35L00的Datasheet PDF文件第5页浏览型号CDB35L00的Datasheet PDF文件第6页浏览型号CDB35L00的Datasheet PDF文件第8页浏览型号CDB35L00的Datasheet PDF文件第9页浏览型号CDB35L00的Datasheet PDF文件第10页 
CDB35L00-X4  
2. GROUNDING AND POWER SUPPLY DECOUPLING  
The CS35L00 requires careful attention to power supply and grounding arrangements to optimize performance and  
minimize radiated emissions. The device decoupling capacitors should be located as close to the CS35L00 as pos-  
sible. This can be optimized by using both top and bottom side component population as demonstrated by the  
CDB35L00-X4 board.  
2.1  
Power Supply Decoupling  
Proper power supply decoupling is one key to maximizing the performance of a Class-D amplifier. Figure 5  
and Figure 6 on page 11 show the component placement for the CDB35L00-X4 board. Note the addition of  
the C13, C23, C33, and C43 capacitors connected to the LFILT+ pin. This pin is used as decoupling for the  
internal LDO regulator when operating in HD or FHD modes.  
The small value decoupling capacitors are placed as close as possible to the power pins of the CS35L00  
on the CDB35L00-X4 board. It is recommended that the power supply decoupling capacitors reside on the  
opposite side of the board from which the CS35L00 is populated on. This allows for very close placement  
of the decoupling capacitors to the power supply pins of the CS35L00 without interfering with the differential  
audio inputs or differential audio outputs. This placement keeps the high-frequency current loop small to  
minimize EMI.  
2.2  
Electromagnetic Interference (EMI)  
This reference design is a board-level solution that is meant to control emissions by minimizing and sup-  
pressing them at the source, in contrast to containing them in an enclosure.  
2.2.1  
Suppression of EMI at the Source  
Several techniques are used in the circuit design and board layout to minimize high-frequency fields in  
the immediate vicinity of the high-power components. Specific techniques include the following:  
• As mentioned in Section 2.1, effective power supply decoupling of high-frequency currents and mini-  
mizing the loop area of the decoupling loop is one aspect of minimizing EMI.  
• Differential input and output signals should be routed differentially whenever possible.  
• A solid ground plane on the adjacent PCB layer underneath all high-frequency traces to minimize the  
loop area of the return path.  
• Optional output EMI filter component landings are available as described in Section 1.7.1, if emissions  
need to be further reduced.  
• Keeping the switching output filter components as close to the amplifier as possible.  
DS913DB2  
7

与CDB35L00相关器件

型号 品牌 获取价格 描述 数据表
CDB35L00-X4 CIRRUS

获取价格

2.7 W x 4 CS35L00 Amplifier Demonstration Board
CDB-37PF HRS

获取价格

CD CRIMP TYPE CONNECTOR
CDB-37SF HRS

获取价格

CD CRIMP TYPE CONNECTOR
CDB-38-70001 MACOM

获取价格

CMOS IC Time Delay Relay
CDB-38-70002 MACOM

获取价格

CMOS IC Time Delay Relay
CDB-38-70003 MACOM

获取价格

CMOS IC Time Delay Relay
CDB-38-70004 MACOM

获取价格

CMOS IC Time Delay Relay
CDB-38-70005 MACOM

获取价格

CMOS IC Time Delay Relay
CDB-38-70006 MACOM

获取价格

CMOS IC Time Delay Relay
CDB-38-70012 MACOM

获取价格

CMOS IC Time Delay Relay