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CD74FCT623SM PDF预览

CD74FCT623SM

更新时间: 2024-02-07 09:55:34
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其他 - ETC 总线收发器
页数 文件大小 规格书
6页 89K
描述
Bus Transceiver

CD74FCT623SM 数据手册

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CD74FCT623  
BiCMOS OCTAL BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCBS736 – JULY 2000  
E, M, OR SM PACKAGE  
(TOP VIEW)  
BiCMOS Technology With Low Quiescent  
Power  
Buffered Inputs  
OEAB  
A1  
V
CC  
OEBA  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
Noninverted Outputs  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
B1  
B2  
B3  
B4  
Input/Output Isolation From V  
CC  
Controlled Output Edge Rates  
64-mA Output Sink Current  
Output Voltage Swing Limited to 3.7 V  
B5  
SCR Latch-Up-Resistant BiCMOS Process  
and Circuit Design  
13 B6  
12 B7  
11  
B8  
Package Options Include Plastic  
Small-Outline (M) and Shrink Small-Outline  
(SM) Packages and Standard Plastic (E) DIP  
description  
TheCD74FCT623isanoctalbustransceiverthatusesasmall-geometryBiCMOStechnology. Theoutputstage  
is a combination of bipolar and CMOS transistors that limits the output high level to two diode drops below V  
.
CC  
This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic  
interference (EMI)] and minimizes V bounce and ground bounce and their effects during simultaneous output  
CC  
switching. The output configuration also enhances switching speed and is capable of sinking 64 mA.  
This device is a noninverting, 3-state, bidirectional transceiver-buffer intended for two-way transmission from  
A bus to B bus or B bus to A bus, depending on the logic levels of the output-enable (OEAB, OEBA) inputs.  
The dual output-enable provision gives these devices the capability to store data by simultaneously enabling  
OEAB and OEBA. Each output reinforces its input under these conditions, and when all other data sources to  
the bus lines are at high impedance, both sets of bus lines remain in their last states.  
The CD74FCT623 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OPERATION  
OEBA  
OEAB  
L
H
H
L
H
L
B data to A bus  
A data to B bus  
Isolation  
B data to A bus,  
A data to B bus  
L
H
To prevent excess current in the  
high-impedance (isolation) state, all I/O  
terminals should be terminated with  
10-kto 1-Mresistors.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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