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BS62LV1600EI70

更新时间: 2024-01-30 17:37:54
品牌 Logo 应用领域
BSI 静态存储器
页数 文件大小 规格书
10页 207K
描述
Very Low Power CMOS SRAM 2M X 8 bit

BS62LV1600EI70 数据手册

 浏览型号BS62LV1600EI70的Datasheet PDF文件第2页浏览型号BS62LV1600EI70的Datasheet PDF文件第3页浏览型号BS62LV1600EI70的Datasheet PDF文件第4页浏览型号BS62LV1600EI70的Datasheet PDF文件第5页浏览型号BS62LV1600EI70的Datasheet PDF文件第6页浏览型号BS62LV1600EI70的Datasheet PDF文件第7页 
Very Low Power CMOS SRAM  
2M X 8 bit  
BS62LV1600  
Pb-Free and Green package materials are compliant to RoHS  
n FEATURES  
ŸWide VCC operation voltage : 2.4V ~ 5.5V  
n DESCRIPTION  
The BS62LV1600 is a high performance, very low power CMOS  
Static Random Access Memory organized as 2048K by 8 bits and  
operates form a wide range of 2.4V to 5.5V supply voltage.  
Advanced CMOS technology and circuit techniques provide both  
high speed and low power features with typical CMOS standby  
current of 1.5uA at 3.0V/25OC and maximum access time of 55ns at  
3.0V/85OC.  
ŸVery low power consumption :  
VCC = 3.0V  
VCC = 5.0V  
Operation current : 46mA (Max.)at 55ns  
2mA (Max.)at 1MHz  
1.5uA (Typ.) at 25OC  
Standby current :  
Operation current : 115mA (Max.)at 55ns  
10mA (Max.)at 1MHz  
Standby current :  
ŸHigh speed access time :  
6.0uA (Typ.) at 25OC  
Easy memory expansion is provided by an active LOW chip enable  
(CE1), an active HIGH chip enable (CE2), and active LOW output  
enable (OE) and three-state output drivers.  
-55  
-70  
55ns (Max.) at VCC : 3.0~5.5V  
70ns (Max.) at VCC : 2.7~5.5V  
ŸAutomatic power down when chip is deselected  
ŸEasy expansion with CE1, CE2 and OE options  
ŸThree state outputs and TTL compatible  
ŸFully static operation  
The BS62LV1600 has an automatic power down feature, reducing  
the power consumption significantly when chip is deselected.  
The BS62LV1600 is available in JEDEC standard 44-pin TSOP II  
and 48-ball BGA package.  
ŸData retention supply voltage as low as 1.5V  
n POWER CONSUMPTION  
POWER DISSIPATION  
Operating  
STANDBY  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
PKG TYPE  
(ICCSB1, Max)  
(ICC, Max)  
VCC=5.0V  
10MHz  
VCC=3.0V  
10MHz  
VCC=5.0V VCC=3.0V  
1MHz  
9mA  
fMax.  
1MHz  
fMax.  
BS62LV1600EC  
BS62LV1600FC  
BS62LV1600EI  
BS62LV1600FI  
TSOP II-44  
Commercial  
50uA  
8.0uA  
16uA  
48mA  
50mA  
113mA  
1.5mA  
19mA  
20mA  
45mA  
+0OC to +70OC  
BGA-48-0912  
TSOP II-44  
Industrial  
100uA  
10mA  
115mA  
2mA  
46mA  
-40OC to +85OC  
BGA-48-0912  
n PIN CONFIGURATIONS  
n BLOCK DIAGRAM  
A4  
A3  
A2  
A1  
A0  
CE1  
NC  
NC  
DQ0  
DQ1  
VCC  
VSS  
DQ2  
DQ3  
NC  
A20  
WE  
A19  
A18  
A17  
A16  
A15  
1
2
3
4
5
6
7
8
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A5  
A6  
A7  
OE  
CE2  
A8  
NC  
A20  
A13  
A17  
A15  
A18  
A16  
A14  
A12  
A7  
Address  
Input  
Memory Array  
4096  
12  
Row  
Decoder  
NC  
9
DQ7  
DQ6  
VSS  
VCC  
DQ5  
DQ4  
NC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Buffer  
4096 x 4096  
BS62LV1600EC  
BS62LV1600EI  
A6  
A5  
A4  
NC  
A9  
4096  
A10  
A11  
A12  
A13  
A14  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
Data  
Input  
8
8
Column I/O  
Buffer  
Write Driver  
Sense Amp  
8
8
Data  
Output  
Buffer  
512  
1
2
3
4
5
6
Column Decoder  
A
B
C
D
E
F
NC  
OE  
A0  
A1  
A2  
CE2  
NC  
9
CE1  
CE2  
WE  
OE  
NC  
NC  
NC  
A3  
A5  
A4  
A6  
CE1  
NC  
Control  
Address Input Buffer  
DQ0  
VSS  
VCC  
DQ3  
NC  
DQ4  
VCC  
VSS  
DQ7  
NC  
VCC  
VSS  
A11 A9 A8 A3 A2 A1 A0 A10A19  
DQ1  
DQ2  
NC  
A17  
NC  
A14  
A12  
A9  
A7  
DQ5  
DQ6  
NC  
A16  
A15  
A13  
A10  
G
H
A20  
A8  
WE  
A11  
A18  
A19  
48-ball BGA top view  
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.  
R0201-BS62LV1600  
Revision 2.2  
Jan. 2006  
1

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