Document Number: MHVIC2114NR2
Rev. 5, 5/2006
Freescale Semiconductor
Technical Data
RF LDMOS Wideband Integrated
Power Amplifier
The MHVIC2114NR2 wideband integrated circuit is designed for base station
applications. It uses Freescale’s newest High Voltage (26 to 28 Volts) LDMOS
IC technology and integrates a multi--stage structure. Its wideband On--Chip
matching design makes it usable from 1600 to 2600 MHz. The linearity
performances cover all modulation formats for cellular applications: CDMA and
W--CDMA. The device is in a PFP--16 flat pack package that provides
excellent thermal performance through a solderable backside contact.
MHVIC2114NR2
2100 MHz, 27 V, 23 dBm
SINGLE W--CDMA
RF LDMOS WIDEBAND
Final Application
INTEGRATED POWER AMPLIFIER
•
Typical Two--Tone Performance: VDD = 27 Volts, IDQ1 = 95 mA, IDQ2
204 mA, IDQ3 = 111 mA, Pout = 15 Watts PEP, Full Frequency Band
Power Gain — 32 dB
=
IMD — --30 dBc
16
Driver Application
1
•
Typical Single--Channel W--CDMA Performance: VDD = 27 Volts, IDQ1 =
96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA, Pout = 23 dBm, 2110--2170 MHz,
3GPP Test Model 1, Measured in 3.84 MHz BW @ 5 MHz Offset, 64
DTCH, PAR = 8.5 dB @ 0.01% Probability on CCDF.
Power Gain — 32 dB
CASE 978--03
PFP--16
ACPR — --58 dBc
•
•
P1dB = 14 Watts, Gain Flatness = 0.2 dB from 2110 to 2170 MHz
Capable of Handling 3:1 VSWR, @ 27 Vdc, 2140 MHz, 15 Watts CW
Output Power
Features
•
Characterized with Series Equivalent Large--Signal Impedance Parameters
and Common Source Scattering Parameters
On--Chip Matching (50 Ohm Input, DC Blocked, >5 Ohm Output)
Integrated Temperature Compensation with Enable/Disable Function
Integrated ESD Protection
•
•
•
•
•
RoHS Compliant
In Tape and Reel. R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel.
N.C.
1
2
3
4
N.C.
V
16
15
14
13
/RF
/RF
/RF
/RF
/RF
V
DS3
out
out
out
out
out
GS3
GS2
GS1
V
V
V
GS3
GS2
GS1
Quiescent Current
Temperature Compensation
V
V
V
V
V
V
DS3
DS3
DS3
DS3
RF
5
6
7
8
12
11
10
9
in
in
RF
RF
I
in C
V
/RF
DS3 out
V
V
V
/RF
DS3
DS1
DS2
out
N.C.
V
V
3 Stages I
DS1
DS2
C
(Top View)
Note: Exposed backside flag is source
terminal for transistors.
Figure 1. Block Diagram
Figure 2. Pin Connections
© Freescale Semiconductor, Inc., 2006. All rights reserved.
MHVIC2114NR2
RF Device Data
Freescale Semiconductor
1