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ATF22V10C-5JL PDF预览

ATF22V10C-5JL

更新时间: 2024-01-16 22:04:04
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
22页 391K
描述
Flash PLD, 5ns, CMOS, PQCC28, PLASTIC, MS-018AB, LCC-28

ATF22V10C-5JL 数据手册

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7. Programming/Erasing  
Programming/erasing is performed using standard PLD programmers. See “CMOS PLD Pro-  
gramming Hardware & Software Support” for information on software/programming.  
Table 7-1.  
Parameter  
tPR  
Programming/Erasing  
Description  
Typ  
600  
3.8  
Max  
1,000  
4.5  
Units  
ns  
Power-up Reset Time  
Power-up Reset Voltage  
VRST  
V
8. Input and I/O Pin-keeper Circuits  
The ATF22V10C contains internal input and I/O pin-keeper circuits. These circuits allow each  
ATF22V10C pin to hold its previous value even when it is not being driven by an external source  
or by the device’s output buffer. This helps to ensure that all logic array inputs are at known valid  
logic levels. This reduces system power by preventing pins from floating to indeterminate levels.  
By using pin-keeper circuits rather than pull-up resistors, there is no DC current required to hold  
the pins in either logic state (high or low).  
These pin-keeper circuits are implemented as weak feedback inverters, as shown in the Input  
Diagram below. These keeper circuits can easily be overdriven by standard TTL- or CMOS-com-  
patible drivers. The typical overdrive current required is 40 µA.  
Figure 8-1. Input Diagram  
8
ATF22V10C(Q)  
0735S–PLD–8/08  

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